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| author | Gabe Black <gblack@eecs.umich.edu> | 2009-07-19 23:54:56 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2009-07-19 23:54:56 -0700 |
| commit | 3e8e813218e7779a41bc12caae33db5e239506c9 (patch) | |
| tree | 289f443de0f36590952706257e633132573b1493 /src/cpu/SConscript | |
| parent | a3a795769a2590451731f683ba11110f4035ab6b (diff) | |
| download | gem5-3e8e813218e7779a41bc12caae33db5e239506c9.tar.xz | |
CPU: Separate out native trace into ISA (in)dependent code and SimObjects.
--HG--
rename : src/cpu/nativetrace.cc => src/arch/sparc/nativetrace.cc
rename : src/cpu/nativetrace.hh => src/arch/sparc/nativetrace.hh
rename : src/cpu/NativeTrace.py => src/arch/x86/X86NativeTrace.py
Diffstat (limited to 'src/cpu/SConscript')
| -rw-r--r-- | src/cpu/SConscript | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/src/cpu/SConscript b/src/cpu/SConscript index 44f8817ff..ea79b622c 100644 --- a/src/cpu/SConscript +++ b/src/cpu/SConscript @@ -112,6 +112,7 @@ SimObject('BaseCPU.py') SimObject('FuncUnit.py') SimObject('ExeTracer.py') SimObject('IntelTrace.py') +SimObject('NativeTrace.py') Source('activity.cc') Source('base.cc') @@ -119,6 +120,7 @@ Source('cpuevent.cc') Source('exetrace.cc') Source('func_unit.cc') Source('inteltrace.cc') +Source('nativetrace.cc') Source('pc_event.cc') Source('quiesce_event.cc') Source('static_inst.cc') @@ -136,10 +138,6 @@ if env['FULL_SYSTEM']: SimObject('LegionTrace.py') Source('legiontrace.cc') -if env['TARGET_ISA'] == 'x86': - SimObject('NativeTrace.py') - Source('nativetrace.cc') - if env['USE_CHECKER']: Source('checker/cpu.cc') TraceFlag('Checker') |