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| author | Ali Saidi <Ali.Saidi@ARM.com> | 2015-02-16 03:32:38 -0500 |
|---|---|---|
| committer | Ali Saidi <Ali.Saidi@ARM.com> | 2015-02-16 03:32:38 -0500 |
| commit | 4eff4fa12eafbf6337fdf9a23668880ad55aad9c (patch) | |
| tree | 7ea64da7b8684c00ba127ffbe8ccca5d0cbeebff /src/cpu/SConscript | |
| parent | 268d9e59c5e69a00456a40c837b0150a8f3f6bf8 (diff) | |
| download | gem5-4eff4fa12eafbf6337fdf9a23668880ad55aad9c.tar.xz | |
cpu: add support for outputing a protobuf formatted CPU trace
Doesn't support x86 due to static instruction representation.
--HG--
rename : src/cpu/CPUTracers.py => src/cpu/InstPBTrace.py
Diffstat (limited to 'src/cpu/SConscript')
| -rw-r--r-- | src/cpu/SConscript | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/cpu/SConscript b/src/cpu/SConscript index 22388e6d9..f2c4f2c06 100644 --- a/src/cpu/SConscript +++ b/src/cpu/SConscript @@ -35,6 +35,11 @@ if env['TARGET_ISA'] == 'null': Source('intr_control_noisa.cc') Return() +# Only build the protocol buffer instructions tracer if we have protobuf support +if env['HAVE_PROTOBUF'] and env['TARGET_ISA'] != 'x86': + SimObject('InstPBTrace.py') + Source('inst_pb_trace.cc') + SimObject('CheckerCPU.py') SimObject('BaseCPU.py') |