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| author | Steve Reinhardt <steve.reinhardt@amd.com> | 2013-10-15 14:22:42 -0400 |
|---|---|---|
| committer | Steve Reinhardt <steve.reinhardt@amd.com> | 2013-10-15 14:22:42 -0400 |
| commit | 7aa423acad07f05ee547117406a72a5c1b4f6015 (patch) | |
| tree | a4a9f24bb94a743b0316ea2a907d07daddc4ffc3 /src/cpu/SConscript | |
| parent | 4f5775df64b1b16ef4a3a02b12e4ac8a6370baed (diff) | |
| download | gem5-7aa423acad07f05ee547117406a72a5c1b4f6015.tar.xz | |
cpu: clean up architectural register classification
Move from a poorly documented scheme where the mapping
of unified architectural register indices to register
classes is hardcoded all over to one where there's an
enum for the register classes and a function that
encapsulates the mapping.
Diffstat (limited to 'src/cpu/SConscript')
| -rw-r--r-- | src/cpu/SConscript | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/cpu/SConscript b/src/cpu/SConscript index 999de1e49..f25758c67 100644 --- a/src/cpu/SConscript +++ b/src/cpu/SConscript @@ -118,6 +118,7 @@ Source('nativetrace.cc') Source('pc_event.cc') Source('profile.cc') Source('quiesce_event.cc') +Source('reg_class.cc') Source('static_inst.cc') Source('simple_thread.cc') Source('thread_context.cc') |