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| author | Gabe Black <gblack@eecs.umich.edu> | 2011-10-31 02:58:22 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2011-10-31 02:58:22 -0700 |
| commit | 8ad2b8c5596b817267fbf7a39e6ce28ffb49789c (patch) | |
| tree | e20e9aa7253fb12e2e6b8abf8932e726728004c1 /src/cpu/SConscript | |
| parent | ef097eb69cec0753074d5190e5ff91aabfaef5e5 (diff) | |
| download | gem5-8ad2b8c5596b817267fbf7a39e6ce28ffb49789c.tar.xz | |
SE/FS: Make the functions available from the TC consistent between SE and FS.
Diffstat (limited to 'src/cpu/SConscript')
| -rw-r--r-- | src/cpu/SConscript | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/cpu/SConscript b/src/cpu/SConscript index 370b83909..c6743caa0 100644 --- a/src/cpu/SConscript +++ b/src/cpu/SConscript @@ -122,6 +122,7 @@ Source('inteltrace.cc') Source('intr_control.cc') Source('nativetrace.cc') Source('pc_event.cc') +Source('profile.cc') Source('quiesce_event.cc') Source('static_inst.cc') Source('simple_thread.cc') @@ -129,8 +130,6 @@ Source('thread_context.cc') Source('thread_state.cc') if env['FULL_SYSTEM']: - Source('profile.cc') - if env['TARGET_ISA'] == 'sparc': SimObject('LegionTrace.py') Source('legiontrace.cc') |