cpu: generate SimPoint basic block vector profiles

This patch is based on http://reviews.m5sim.org/r/1474/ originally written by
Mitch Hayenga. Basic block vectors are generated (simpoint.bb.gz in simout
folder) based on start and end addresses of basic blocks.

Some comments to the original patch are addressed and hooks are added to create
and resume from checkpoints based on instruction counts dictated by external
SimPoint analysis tools.

SimPoint creation/resuming options will be implemented as a separate patch.

1 files changed, 12 insertions, 0 deletions

diff --git a/src/cpu/base.cc b/src/cpu/base.cc
index de0f8b23b..c7c1dadda 100644
--- a/src/cpu/base.cc
+++ b/src/cpu/base.cc
@@ -153,6 +153,18 @@ BaseCPU::BaseCPU(Params *p, bool is_checker)
         }
     }
 
+    // Set up instruction-count-based termination events for SimPoints
+    // Typically, there are more than one action points.
+    // Simulation.py is responsible to take the necessary actions upon
+    // exitting the simulation loop.
+    if (!p->simpoint_start_insts.empty()) {
+        const char *cause = "simpoint starting point found";
+        for (size_t i = 0; i < p->simpoint_start_insts.size(); ++i) {
+            Event *event = new SimLoopExitEvent(cause, 0);
+            comInstEventQueue[0]->schedule(event, p->simpoint_start_insts[i]);
+        }
+    }
+
     if (p->max_insts_all_threads != 0) {
         const char *cause = "all threads reached the max instruction count";