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author | Andreas Hansson <andreas.hansson@arm.com> | 2012-10-15 08:12:35 -0400 |
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committer | Andreas Hansson <andreas.hansson@arm.com> | 2012-10-15 08:12:35 -0400 |
commit | 2a740aa09682c32eb8f1f8880f279c943d8c6ee1 (patch) | |
tree | 61ca1dcb9336bc1f4dbc791c876875c1c260ca8d /src/cpu/base.cc | |
parent | 9baa35ba802f2cfb9fb9ecdebf111f4cd793a428 (diff) | |
download | gem5-2a740aa09682c32eb8f1f8880f279c943d8c6ee1.tar.xz |
Port: Add protocol-agnostic ports in the port hierarchy
This patch adds an additional level of ports in the inheritance
hierarchy, separating out the protocol-specific and protocl-agnostic
parts. All the functionality related to the binding of ports is now
confined to use BaseMaster/BaseSlavePorts, and all the
protocol-specific parts stay in the Master/SlavePort. In the future it
will be possible to add other protocol-specific implementations.
The functions used in the binding of ports, i.e. getMaster/SlavePort
now use the base classes, and the index parameter is updated to use
the PortID typedef with the symbolic InvalidPortID as the default.
Diffstat (limited to 'src/cpu/base.cc')
-rw-r--r-- | src/cpu/base.cc | 34 |
1 files changed, 18 insertions, 16 deletions
diff --git a/src/cpu/base.cc b/src/cpu/base.cc index 1add92d1f..93c9f8629 100644 --- a/src/cpu/base.cc +++ b/src/cpu/base.cc @@ -296,8 +296,8 @@ BaseCPU::regStats() threadContexts[0]->regStats(name()); } -MasterPort & -BaseCPU::getMasterPort(const string &if_name, int idx) +BaseMasterPort & +BaseCPU::getMasterPort(const string &if_name, PortID idx) { // Get the right port based on name. This applies to all the // subclasses of the base CPU and relies on their implementation @@ -380,17 +380,17 @@ BaseCPU::takeOverFrom(BaseCPU *oldCPU) ThreadContext::compare(oldTC, newTC); */ - MasterPort *old_itb_port = oldTC->getITBPtr()->getMasterPort(); - MasterPort *old_dtb_port = oldTC->getDTBPtr()->getMasterPort(); - MasterPort *new_itb_port = newTC->getITBPtr()->getMasterPort(); - MasterPort *new_dtb_port = newTC->getDTBPtr()->getMasterPort(); + BaseMasterPort *old_itb_port = oldTC->getITBPtr()->getMasterPort(); + BaseMasterPort *old_dtb_port = oldTC->getDTBPtr()->getMasterPort(); + BaseMasterPort *new_itb_port = newTC->getITBPtr()->getMasterPort(); + BaseMasterPort *new_dtb_port = newTC->getDTBPtr()->getMasterPort(); // Move over any table walker ports if they exist if (new_itb_port) { assert(!new_itb_port->isConnected()); assert(old_itb_port); assert(old_itb_port->isConnected()); - SlavePort &slavePort = old_itb_port->getSlavePort(); + BaseSlavePort &slavePort = old_itb_port->getSlavePort(); old_itb_port->unbind(); new_itb_port->bind(slavePort); } @@ -398,7 +398,7 @@ BaseCPU::takeOverFrom(BaseCPU *oldCPU) assert(!new_dtb_port->isConnected()); assert(old_dtb_port); assert(old_dtb_port->isConnected()); - SlavePort &slavePort = old_dtb_port->getSlavePort(); + BaseSlavePort &slavePort = old_dtb_port->getSlavePort(); old_dtb_port->unbind(); new_dtb_port->bind(slavePort); } @@ -408,13 +408,13 @@ BaseCPU::takeOverFrom(BaseCPU *oldCPU) CheckerCPU *oldChecker = oldTC->getCheckerCpuPtr(); CheckerCPU *newChecker = newTC->getCheckerCpuPtr(); if (oldChecker && newChecker) { - MasterPort *old_checker_itb_port = + BaseMasterPort *old_checker_itb_port = oldChecker->getITBPtr()->getMasterPort(); - MasterPort *old_checker_dtb_port = + BaseMasterPort *old_checker_dtb_port = oldChecker->getDTBPtr()->getMasterPort(); - MasterPort *new_checker_itb_port = + BaseMasterPort *new_checker_itb_port = newChecker->getITBPtr()->getMasterPort(); - MasterPort *new_checker_dtb_port = + BaseMasterPort *new_checker_dtb_port = newChecker->getDTBPtr()->getMasterPort(); // Move over any table walker ports if they exist for checker @@ -422,7 +422,8 @@ BaseCPU::takeOverFrom(BaseCPU *oldCPU) assert(!new_checker_itb_port->isConnected()); assert(old_checker_itb_port); assert(old_checker_itb_port->isConnected()); - SlavePort &slavePort = old_checker_itb_port->getSlavePort(); + BaseSlavePort &slavePort = + old_checker_itb_port->getSlavePort(); old_checker_itb_port->unbind(); new_checker_itb_port->bind(slavePort); } @@ -430,7 +431,8 @@ BaseCPU::takeOverFrom(BaseCPU *oldCPU) assert(!new_checker_dtb_port->isConnected()); assert(old_checker_dtb_port); assert(old_checker_dtb_port->isConnected()); - SlavePort &slavePort = old_checker_dtb_port->getSlavePort(); + BaseSlavePort &slavePort = + old_checker_dtb_port->getSlavePort(); old_checker_dtb_port->unbind(); new_checker_dtb_port->bind(slavePort); } @@ -455,13 +457,13 @@ BaseCPU::takeOverFrom(BaseCPU *oldCPU) // we are switching to. assert(!getInstPort().isConnected()); assert(oldCPU->getInstPort().isConnected()); - SlavePort &inst_peer_port = oldCPU->getInstPort().getSlavePort(); + BaseSlavePort &inst_peer_port = oldCPU->getInstPort().getSlavePort(); oldCPU->getInstPort().unbind(); getInstPort().bind(inst_peer_port); assert(!getDataPort().isConnected()); assert(oldCPU->getDataPort().isConnected()); - SlavePort &data_peer_port = oldCPU->getDataPort().getSlavePort(); + BaseSlavePort &data_peer_port = oldCPU->getDataPort().getSlavePort(); oldCPU->getDataPort().unbind(); getDataPort().bind(data_peer_port); } |