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| author | Brad Beckmann <Brad.Beckmann@amd.com> | 2011-02-06 22:14:19 -0800 |
|---|---|---|
| committer | Brad Beckmann <Brad.Beckmann@amd.com> | 2011-02-06 22:14:19 -0800 |
| commit | dfa8cbeb06b7556753c26b97978924c1f4a24699 (patch) | |
| tree | 5c47168bd2d8794612d385cc12277c5212660e40 /src/cpu/base.cc | |
| parent | c41fc138e78420c72d8dada805a16c96f74f631b (diff) | |
| download | gem5-dfa8cbeb06b7556753c26b97978924c1f4a24699.tar.xz | |
m5: added work completed monitoring support
Diffstat (limited to 'src/cpu/base.cc')
| -rw-r--r-- | src/cpu/base.cc | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/cpu/base.cc b/src/cpu/base.cc index b7decaec1..17ae65793 100644 --- a/src/cpu/base.cc +++ b/src/cpu/base.cc @@ -255,6 +255,16 @@ BaseCPU::regStats() .desc("number of cpu cycles simulated") ; + numWorkItemsStarted + .name(name() + ".numWorkItemsStarted") + .desc("number of work items this cpu started") + ; + + numWorkItemsCompleted + .name(name() + ".numWorkItemsCompleted") + .desc("number of work items this cpu completed") + ; + int size = threadContexts.size(); if (size > 1) { for (int i = 0; i < size; ++i) { |