diff options
author | Mitch Hayenga <mitch.hayenga@arm.com> | 2015-09-30 11:14:19 -0500 |
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committer | Mitch Hayenga <mitch.hayenga@arm.com> | 2015-09-30 11:14:19 -0500 |
commit | fafa83ed32933fe250d34dfca23fba348429b176 (patch) | |
tree | 3bf8fd636f1e879273045fefda3b5d7319a38479 /src/cpu/base.cc | |
parent | 582a0148b441fe9f4a6f977094c5ce6bf7ab6313 (diff) | |
download | gem5-fafa83ed32933fe250d34dfca23fba348429b176.tar.xz |
cpu: Add per-thread monitors
Adds per-thread address monitors to support FullSystem SMT.
Diffstat (limited to 'src/cpu/base.cc')
-rw-r--r-- | src/cpu/base.cc | 47 |
1 files changed, 28 insertions, 19 deletions
diff --git a/src/cpu/base.cc b/src/cpu/base.cc index 77ac5f2bb..3b0809d09 100644 --- a/src/cpu/base.cc +++ b/src/cpu/base.cc @@ -133,7 +133,7 @@ BaseCPU::BaseCPU(Params *p, bool is_checker) numThreads(p->numThreads), system(p->system), functionTraceStream(nullptr), currentFunctionStart(0), currentFunctionEnd(0), functionEntryTick(0), - addressMonitor() + addressMonitor(p->numThreads) { // if Python did not provide a valid ID, do it here if (_cpuId == -1 ) { @@ -271,39 +271,48 @@ BaseCPU::~BaseCPU() } void -BaseCPU::armMonitor(Addr address) +BaseCPU::armMonitor(ThreadID tid, Addr address) { - addressMonitor.armed = true; - addressMonitor.vAddr = address; - addressMonitor.pAddr = 0x0; - DPRINTF(Mwait,"Armed monitor (vAddr=0x%lx)\n", address); + assert(tid < numThreads); + AddressMonitor &monitor = addressMonitor[tid]; + + monitor.armed = true; + monitor.vAddr = address; + monitor.pAddr = 0x0; + DPRINTF(Mwait,"[tid:%d] Armed monitor (vAddr=0x%lx)\n", tid, address); } bool -BaseCPU::mwait(PacketPtr pkt) +BaseCPU::mwait(ThreadID tid, PacketPtr pkt) { - if(addressMonitor.gotWakeup == false) { + assert(tid < numThreads); + AddressMonitor &monitor = addressMonitor[tid]; + + if(monitor.gotWakeup == false) { int block_size = cacheLineSize(); uint64_t mask = ~((uint64_t)(block_size - 1)); assert(pkt->req->hasPaddr()); - addressMonitor.pAddr = pkt->getAddr() & mask; - addressMonitor.waiting = true; + monitor.pAddr = pkt->getAddr() & mask; + monitor.waiting = true; - DPRINTF(Mwait,"mwait called (vAddr=0x%lx, line's paddr=0x%lx)\n", - addressMonitor.vAddr, addressMonitor.pAddr); + DPRINTF(Mwait,"[tid:%d] mwait called (vAddr=0x%lx, " + "line's paddr=0x%lx)\n", tid, monitor.vAddr, monitor.pAddr); return true; } else { - addressMonitor.gotWakeup = false; + monitor.gotWakeup = false; return false; } } void -BaseCPU::mwaitAtomic(ThreadContext *tc, TheISA::TLB *dtb) +BaseCPU::mwaitAtomic(ThreadID tid, ThreadContext *tc, TheISA::TLB *dtb) { + assert(tid < numThreads); + AddressMonitor &monitor = addressMonitor[tid]; + Request req; - Addr addr = addressMonitor.vAddr; + Addr addr = monitor.vAddr; int block_size = cacheLineSize(); uint64_t mask = ~((uint64_t)(block_size - 1)); int size = block_size; @@ -320,11 +329,11 @@ BaseCPU::mwaitAtomic(ThreadContext *tc, TheISA::TLB *dtb) Fault fault = dtb->translateAtomic(&req, tc, BaseTLB::Read); assert(fault == NoFault); - addressMonitor.pAddr = req.getPaddr() & mask; - addressMonitor.waiting = true; + monitor.pAddr = req.getPaddr() & mask; + monitor.waiting = true; - DPRINTF(Mwait,"mwait called (vAddr=0x%lx, line's paddr=0x%lx)\n", - addressMonitor.vAddr, addressMonitor.pAddr); + DPRINTF(Mwait,"[tid:%d] mwait called (vAddr=0x%lx, line's paddr=0x%lx)\n", + tid, monitor.vAddr, monitor.pAddr); } void |