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authorJose Marinho <jose.marinho@arm.com>2017-10-19 18:45:26 +0100
committerAndreas Sandberg <andreas.sandberg@arm.com>2017-11-20 17:34:49 +0000
commit7bd68dbc368e2d877f6159f5d0039198983e459a (patch)
tree520b10f7f9f5c9eb1e912f29bacf1a10bcff87d5 /src/cpu/base.hh
parentc0d613adb4eca09c32aca1cc90f04c29574f69c6 (diff)
downloadgem5-7bd68dbc368e2d877f6159f5d0039198983e459a.tar.xz
cpu: Make automatic transition to OFF optional
Add the power_gating_on_idle option to control whether a core automatically enters the power gated state. The default behaviour is to transition to clock gated when idle, but not to power gated. When this option is set to true, the core automatically transitions to the power gated state after a configurable latency. Change-Id: Ida98c7fc532de4140d0e511c25613769b47b3702 Reviewed-on: https://gem5-review.googlesource.com/5741 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/cpu/base.hh')
-rw-r--r--src/cpu/base.hh5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/cpu/base.hh b/src/cpu/base.hh
index 7039fcfbc..13c56a945 100644
--- a/src/cpu/base.hh
+++ b/src/cpu/base.hh
@@ -588,10 +588,13 @@ class BaseCPU : public MemObject
bool waitForRemoteGDB() const;
Cycles syscallRetryLatency;
+
// Enables CPU to enter power gating on a configurable cycle count
protected:
- const Cycles pwrGatingLatency;
void enterPwrGating();
+
+ const Cycles pwrGatingLatency;
+ const bool powerGatingOnIdle;
EventFunctionWrapper enterPwrGatingEvent;
};