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authorGabe Black <gblack@eecs.umich.edu>2007-03-15 02:47:42 +0000
committerGabe Black <gblack@eecs.umich.edu>2007-03-15 02:47:42 +0000
commita2b56088fb4d12aee73ecfeaba88cfa46f98567e (patch)
tree7c6787e2757e9e5d047a3b6cec1b71b4eef915f1 /src/cpu/base.hh
parentce18d900a17cdda2cc041b51c56e6c84fb155331 (diff)
downloadgem5-a2b56088fb4d12aee73ecfeaba88cfa46f98567e.tar.xz
Make the predecoder an object with it's own switched header file. Start adding predecoding functionality to x86.
src/arch/SConscript: src/arch/alpha/utility.hh: src/arch/mips/utility.hh: src/arch/sparc/utility.hh: src/cpu/base.hh: src/cpu/o3/fetch.hh: src/cpu/o3/fetch_impl.hh: src/cpu/simple/atomic.cc: src/cpu/simple/base.cc: src/cpu/simple/base.hh: src/cpu/static_inst.hh: src/arch/alpha/predecoder.hh: src/arch/mips/predecoder.hh: src/arch/sparc/predecoder.hh: Make the predecoder an object with it's own switched header file. --HG-- extra : convert_revision : 77206e29089130e86b97164c30022a062699ba86
Diffstat (limited to 'src/cpu/base.hh')
-rw-r--r--src/cpu/base.hh8
1 files changed, 7 insertions, 1 deletions
diff --git a/src/cpu/base.hh b/src/cpu/base.hh
index d4213887d..85f5b7725 100644
--- a/src/cpu/base.hh
+++ b/src/cpu/base.hh
@@ -34,11 +34,11 @@
#include <vector>
+#include "arch/isa_traits.hh"
#include "base/statistics.hh"
#include "config/full_system.hh"
#include "sim/eventq.hh"
#include "mem/mem_object.hh"
-#include "arch/isa_traits.hh"
#if FULL_SYSTEM
#include "arch/interrupts.hh"
@@ -50,6 +50,11 @@ class ThreadContext;
class System;
class Port;
+namespace TheISA
+{
+ class Predecoder;
+}
+
class CPUProgressEvent : public Event
{
protected:
@@ -125,6 +130,7 @@ class BaseCPU : public MemObject
protected:
std::vector<ThreadContext *> threadContexts;
+ std::vector<TheISA::Predecoder *> predecoders;
public: