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author | Gabe Black <gblack@eecs.umich.edu> | 2007-07-28 20:30:43 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2007-07-28 20:30:43 -0700 |
commit | 8dd7700482b8ad7fa5e96469b23f0c917f5e3599 (patch) | |
tree | c1e9e7e835a12992eda9f9ee90e4f984816ed059 /src/cpu/base.hh | |
parent | cda354b07035f73a3b220f89014721300d36a815 (diff) | |
download | gem5-8dd7700482b8ad7fa5e96469b23f0c917f5e3599.tar.xz |
Turn the instruction tracing code into pluggable sim objects.
These need to be refined a little still and given parameters.
--HG--
extra : convert_revision : 9a8f5a7bd9dacbebbbd2c235cd890c49a81040d7
Diffstat (limited to 'src/cpu/base.hh')
-rw-r--r-- | src/cpu/base.hh | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/cpu/base.hh b/src/cpu/base.hh index 4d8300186..76f6e4684 100644 --- a/src/cpu/base.hh +++ b/src/cpu/base.hh @@ -38,6 +38,7 @@ #include "base/statistics.hh" #include "config/full_system.hh" #include "sim/eventq.hh" +#include "sim/insttracer.hh" #include "mem/mem_object.hh" #if FULL_SYSTEM @@ -132,8 +133,13 @@ class BaseCPU : public MemObject std::vector<ThreadContext *> threadContexts; std::vector<TheISA::Predecoder *> predecoders; + Trace::InstTracer * tracer; + public: + /// Provide access to the tracer pointer + Trace::InstTracer * getTracer() { return tracer; } + /// Notify the CPU that the indicated context is now active. The /// delay parameter indicates the number of ticks to wait before /// executing (typically 0 or 1). @@ -169,6 +175,8 @@ class BaseCPU : public MemObject Tick functionTraceStart; System *system; int cpu_id; + Trace::InstTracer * tracer; + Tick phase; #if FULL_SYSTEM Tick profile; |