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| author | Mitch Hayenga <mitch.hayenga@arm.com> | 2016-04-07 09:30:20 -0500 |
|---|---|---|
| committer | Mitch Hayenga <mitch.hayenga@arm.com> | 2016-04-07 09:30:20 -0500 |
| commit | c75ff71139d6358678835cca63e35d1135eaf466 (patch) | |
| tree | 0811177db4dca4a237b8e5d7dd65f8ec155cb14e /src/cpu/base.hh | |
| parent | d99deff8ea296fd28b48da08aba577a1e7dfc01b (diff) | |
| download | gem5-c75ff71139d6358678835cca63e35d1135eaf466.tar.xz | |
mem: Remove threadId from memory request class
In general, the ThreadID parameter is unnecessary in the memory system
as the ContextID is what is used for the purposes of locks/wakeups.
Since we allocate sequential ContextIDs for each thread on MT-enabled
CPUs, ThreadID is unnecessary as the CPUs can identify the requesting
thread through sideband info (SenderState / LSQ entries) or ContextID
offset from the base ContextID for a cpu.
This is a re-spin of 20264eb after the revert (bd1c6789) and includes
some fixes of that commit.
Diffstat (limited to 'src/cpu/base.hh')
| -rw-r--r-- | src/cpu/base.hh | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/cpu/base.hh b/src/cpu/base.hh index 438c38812..748602c25 100644 --- a/src/cpu/base.hh +++ b/src/cpu/base.hh @@ -296,6 +296,10 @@ class BaseCPU : public MemObject /// Get the number of thread contexts available unsigned numContexts() { return threadContexts.size(); } + /// Convert ContextID to threadID + ThreadID contextToThread(ContextID cid) + { return static_cast<ThreadID>(cid - threadContexts[0]->contextId()); } + public: typedef BaseCPUParams Params; const Params *params() const |