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authorGabe Black <gblack@eecs.umich.edu>2009-04-26 02:09:54 -0700
committerGabe Black <gblack@eecs.umich.edu>2009-04-26 02:09:54 -0700
commit06b3e3c303599e4227212638fa4778d115842eea (patch)
treefa55d4cc4058d9ddc87630603ef137856fe2a0c8 /src/cpu/base.hh
parent2f34a7eaeb6d82b745fbd57fa4cc31d874ed202c (diff)
downloadgem5-06b3e3c303599e4227212638fa4778d115842eea.tar.xz
X86: Implement lowest priority interrupts more correctly.
Lowest priority interrupts are now delivered based on a rotating offset into the list of potential recipients. There could be parasitic cases were a processor gets picked on and ends up at that rotating offset all the time, but it's much more likely that the group will stay consistent and the pain will be distributed evenly.
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