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| author | Ali Saidi <Ali.Saidi@ARM.com> | 2010-12-07 16:19:57 -0800 |
|---|---|---|
| committer | Ali Saidi <Ali.Saidi@ARM.com> | 2010-12-07 16:19:57 -0800 |
| commit | e681c0f7b30f521805ebec04271435306f4c56ed (patch) | |
| tree | 4b060d7175b0d90c9d4a731d0cad304b60dac029 /src/cpu/base_dyn_inst.hh | |
| parent | 719f9a6d4fba16af38dcfd62b25a4d708156699f (diff) | |
| download | gem5-e681c0f7b30f521805ebec04271435306f4c56ed.tar.xz | |
O3: Support squashing all state after special instruction
For SPARC ASIs are added to the ExtMachInst. If the ASI is changed simply
marking the instruction as Serializing isn't enough beacuse that only
stops rename. This provides a mechanism to squash all the instructions
and refetch them
Diffstat (limited to 'src/cpu/base_dyn_inst.hh')
| -rw-r--r-- | src/cpu/base_dyn_inst.hh | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/cpu/base_dyn_inst.hh b/src/cpu/base_dyn_inst.hh index bd2d9fa95..0c566ec65 100644 --- a/src/cpu/base_dyn_inst.hh +++ b/src/cpu/base_dyn_inst.hh @@ -478,6 +478,7 @@ class BaseDynInst : public FastAlloc, public RefCounted { return staticInst->isSerializeBefore() || status[SerializeBefore]; } bool isSerializeAfter() const { return staticInst->isSerializeAfter() || status[SerializeAfter]; } + bool isSquashAfter() const { return staticInst->isSquashAfter(); } bool isMemBarrier() const { return staticInst->isMemBarrier(); } bool isWriteBarrier() const { return staticInst->isWriteBarrier(); } bool isNonSpeculative() const { return staticInst->isNonSpeculative(); } |