ARM/O3: store the result of the predicate evaluation in DynInst or Threadstate.

THis allows the CPU to handle predicated-false instructions accordingly.
This particular patch makes loads that are predicated-false to be sent
straight to the commit stage directly, not waiting for return of the data
that was never requested since it was predicated-false.

1 files changed, 13 insertions, 0 deletions

diff --git a/src/cpu/base_dyn_inst.hh b/src/cpu/base_dyn_inst.hh
index 6ea00dd3d..a992664d0 100644
--- a/src/cpu/base_dyn_inst.hh
+++ b/src/cpu/base_dyn_inst.hh
@@ -246,6 +246,9 @@ class BaseDynInst : public FastAlloc, public RefCounted
     /** Micro PC of this instruction. */
     Addr microPC;
 
+    /** Did this instruction execute, or is it predicated false */
+    bool predicate;
+
   protected:
     /** Next non-speculative PC.  It is not filled in at fetch, but rather
      *  once the target of the branch is truly known (either decode or
@@ -794,6 +797,16 @@ class BaseDynInst : public FastAlloc, public RefCounted
         nextMicroPC = val;
     }
 
+    bool readPredicate()
+    {
+        return predicate;
+    }
+
+    void setPredicate(bool val)
+    {
+        predicate = val;
+    }
+
     /** Sets the ASID. */
     void setASID(short addr_space_id) { asid = addr_space_id; }