Merged with Gabe's recent changes.

1 files changed, 7 insertions, 56 deletions

diff --git a/src/cpu/base_dyn_inst.hh b/src/cpu/base_dyn_inst.hh
index 4c7abe376..f0d36cc83 100644
--- a/src/cpu/base_dyn_inst.hh
+++ b/src/cpu/base_dyn_inst.hh
@@ -124,31 +124,10 @@ class BaseDynInst : public FastAlloc, public RefCounted
         cpu->demapPage(vaddr, asn);
     }
 
-    /**
-     * Does a read to a given address.
-     * @param addr The address to read.
-     * @param data The read's data is written into this parameter.
-     * @param flags The request's flags.
-     * @return Returns any fault due to the read.
-     */
-    template <class T>
-    Fault read(Addr addr, T &data, unsigned flags);
-
-    Fault readBytes(Addr addr, uint8_t *data, unsigned size, unsigned flags);
-
-    /**
-     * Does a write to a given address.
-     * @param data The data to be written.
-     * @param addr The address to write to.
-     * @param flags The request's flags.
-     * @param res The result of the write (for load locked/store conditionals).
-     * @return Returns any fault due to the write.
-     */
-    template <class T>
-    Fault write(T data, Addr addr, unsigned flags, uint64_t *res);
+    Fault readMem(Addr addr, uint8_t *data, unsigned size, unsigned flags);
 
-    Fault writeBytes(uint8_t *data, unsigned size,
-                     Addr addr, unsigned flags, uint64_t *res);
+    Fault writeMem(uint8_t *data, unsigned size,
+                   Addr addr, unsigned flags, uint64_t *res);
 
     /** Splits a request in two if it crosses a dcache block. */
     void splitRequest(RequestPtr req, RequestPtr &sreqLow,
@@ -862,8 +841,8 @@ class BaseDynInst : public FastAlloc, public RefCounted
 
 template<class Impl>
 Fault
-BaseDynInst<Impl>::readBytes(Addr addr, uint8_t *data,
-                             unsigned size, unsigned flags)
+BaseDynInst<Impl>::readMem(Addr addr, uint8_t *data,
+                           unsigned size, unsigned flags)
 {
     reqMade = true;
     Request *req = NULL;
@@ -913,25 +892,9 @@ BaseDynInst<Impl>::readBytes(Addr addr, uint8_t *data,
 }
 
 template<class Impl>
-template<class T>
-inline Fault
-BaseDynInst<Impl>::read(Addr addr, T &data, unsigned flags)
-{
-    Fault fault = readBytes(addr, (uint8_t *)&data, sizeof(T), flags);
-
-    data = TheISA::gtoh(data);
-
-    if (traceData) {
-        traceData->setData(data);
-    }
-
-    return fault;
-}
-
-template<class Impl>
 Fault
-BaseDynInst<Impl>::writeBytes(uint8_t *data, unsigned size,
-                              Addr addr, unsigned flags, uint64_t *res)
+BaseDynInst<Impl>::writeMem(uint8_t *data, unsigned size,
+                            Addr addr, unsigned flags, uint64_t *res)
 {
     if (traceData) {
         traceData->setAddr(addr);
@@ -968,18 +931,6 @@ BaseDynInst<Impl>::writeBytes(uint8_t *data, unsigned size,
 }
 
 template<class Impl>
-template<class T>
-inline Fault
-BaseDynInst<Impl>::write(T data, Addr addr, unsigned flags, uint64_t *res)
-{
-    if (traceData) {
-        traceData->setData(data);
-    }
-    data = TheISA::htog(data);
-    return writeBytes((uint8_t *)&data, sizeof(T), addr, flags, res);
-}
-
-template<class Impl>
 inline void
 BaseDynInst<Impl>::splitRequest(RequestPtr req, RequestPtr &sreqLow,
                                 RequestPtr &sreqHigh)