diff options
author | Lisa Hsu <hsul@eecs.umich.edu> | 2006-12-12 21:19:51 -0500 |
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committer | Lisa Hsu <hsul@eecs.umich.edu> | 2006-12-12 21:19:51 -0500 |
commit | 5d42fd836b88c1a234a5d7ddd768422f9878e2df (patch) | |
tree | bf0c98492bfa25e3e128a19769e9562ea3897596 /src/cpu/base_dyn_inst.hh | |
parent | 369e10d95adb45da7a791e6e8a6a4ced64892f14 (diff) | |
parent | 6c8c86f2f97913788237f763d4810ab12730ca60 (diff) | |
download | gem5-5d42fd836b88c1a234a5d7ddd768422f9878e2df.tar.xz |
Merge zizzer:/bk/newmem
into zed.eecs.umich.edu:/z/hsul/work/sparc/m5
--HG--
extra : convert_revision : 6e58629b1e51f1fc493a89f16c3f2e676dc5d191
Diffstat (limited to 'src/cpu/base_dyn_inst.hh')
-rw-r--r-- | src/cpu/base_dyn_inst.hh | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/src/cpu/base_dyn_inst.hh b/src/cpu/base_dyn_inst.hh index 4a4555566..9037c96df 100644 --- a/src/cpu/base_dyn_inst.hh +++ b/src/cpu/base_dyn_inst.hh @@ -406,14 +406,15 @@ class BaseDynInst : public FastAlloc, public RefCounted double readDoubleResult() { return instResult.dbl; } /** Records an integer register being set to a value. */ - void setIntReg(const StaticInst *si, int idx, uint64_t val) + void setIntRegOperand(const StaticInst *si, int idx, uint64_t val) { if (recordResult) instResult.integer = val; } /** Records an fp register being set to a value. */ - void setFloatReg(const StaticInst *si, int idx, FloatReg val, int width) + void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val, + int width) { if (recordResult) { if (width == 32) @@ -426,21 +427,22 @@ class BaseDynInst : public FastAlloc, public RefCounted } /** Records an fp register being set to a value. */ - void setFloatReg(const StaticInst *si, int idx, FloatReg val) + void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val) { if (recordResult) instResult.dbl = (double)val; } /** Records an fp register being set to an integer value. */ - void setFloatRegBits(const StaticInst *si, int idx, uint64_t val, int width) + void setFloatRegOperandBits(const StaticInst *si, int idx, uint64_t val, + int width) { if (recordResult) instResult.integer = val; } /** Records an fp register being set to an integer value. */ - void setFloatRegBits(const StaticInst *si, int idx, uint64_t val) + void setFloatRegOperandBits(const StaticInst *si, int idx, uint64_t val) { if (recordResult) instResult.integer = val; |