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authorKevin Lim <ktlim@umich.edu>2006-06-12 19:04:42 -0400
committerKevin Lim <ktlim@umich.edu>2006-06-12 19:04:42 -0400
commit4acb283496c7667bf0161f45e578c702d2cf8dbc (patch)
tree43a88dbf3a835170f685cc95c2ca315c6a1d710b /src/cpu/base_dyn_inst.hh
parentfbf3a82c5c358d75acd9a97ad1dcef9796b83c96 (diff)
downloadgem5-4acb283496c7667bf0161f45e578c702d2cf8dbc.tar.xz
Clean up/shift some code around.
src/cpu/base_dyn_inst.cc: Clean up some code and update. src/cpu/base_dyn_inst.hh: Clean up some code and update with more descriptive function names. src/cpu/o3/alpha_cpu_builder.cc: src/cpu/o3/alpha_params.hh: src/cpu/o3/commit.hh: Remove unused parameters. src/cpu/o3/commit_impl.hh: Remove unused parameters, also set squashCounter directly to the counted number of squashes. src/cpu/o3/fetch_impl.hh: Update for function name changes. src/cpu/o3/iew.hh: src/cpu/o3/iew_impl.hh: Remove unused parameter, move some code into a function. --HG-- extra : convert_revision : 45abd77ad43dde2e93c2e53c4738c90ba8352a1d
Diffstat (limited to 'src/cpu/base_dyn_inst.hh')
-rw-r--r--src/cpu/base_dyn_inst.hh38
1 files changed, 11 insertions, 27 deletions
diff --git a/src/cpu/base_dyn_inst.hh b/src/cpu/base_dyn_inst.hh
index 948ee058a..fc9bf8b94 100644
--- a/src/cpu/base_dyn_inst.hh
+++ b/src/cpu/base_dyn_inst.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2004-2005 The Regents of The University of Michigan
+ * Copyright (c) 2004-2006 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -44,12 +44,6 @@
#include "cpu/static_inst.hh"
#include "mem/packet.hh"
#include "sim/system.hh"
-/*
-#include "encumbered/cpu/full/bpred_update.hh"
-#include "encumbered/cpu/full/spec_memory.hh"
-#include "encumbered/cpu/full/spec_state.hh"
-#include "encumbered/mem/functional/main.hh"
-*/
/**
* @file
@@ -202,10 +196,9 @@ class BaseDynInst : public FastAlloc, public RefCounted
Fault fault;
/** The memory request. */
-// MemReqPtr req;
Request *req;
-// Packet pkt;
+ /** Pointer to the data for the memory access. */
uint8_t *memData;
/** The effective virtual address (lds & stores only). */
@@ -288,21 +281,6 @@ class BaseDynInst : public FastAlloc, public RefCounted
void initVars();
public:
- /**
- * @todo: Make this function work; currently it is a dummy function.
- * @param fault Last fault.
- * @param cmd Last command.
- * @param addr Virtual address of access.
- * @param p Memory accessed.
- * @param nbytes Access size.
- */
-// void
-// trace_mem(Fault fault,
-// MemCmd cmd,
-// Addr addr,
-// void *p,
-// int nbytes);
-
/** Dumps out contents of this BaseDynInst. */
void dump();
@@ -439,11 +417,13 @@ class BaseDynInst : public FastAlloc, public RefCounted
/** Returns the result of a floating point (double) instruction. */
double readDoubleResult() { return instResult.dbl; }
+ /** Records an integer register being set to a value. */
void setIntReg(const StaticInst *si, int idx, uint64_t val)
{
instResult.integer = val;
}
+ /** Records an fp register being set to a value. */
void setFloatReg(const StaticInst *si, int idx, FloatReg val, int width)
{
if (width == 32)
@@ -454,16 +434,19 @@ class BaseDynInst : public FastAlloc, public RefCounted
panic("Unsupported width!");
}
+ /** Records an fp register being set to a value. */
void setFloatReg(const StaticInst *si, int idx, FloatReg val)
{
instResult.fp = val;
}
+ /** Records an fp register being set to an integer value. */
void setFloatRegBits(const StaticInst *si, int idx, uint64_t val, int width)
{
instResult.integer = val;
}
+ /** Records an fp register being set to an integer value. */
void setFloatRegBits(const StaticInst *si, int idx, uint64_t val)
{
instResult.integer = val;
@@ -590,14 +573,15 @@ class BaseDynInst : public FastAlloc, public RefCounted
void setNextPC(uint64_t val)
{
nextPC = val;
-// instResult.integer = val;
}
+ /** Sets the ASID. */
void setASID(short addr_space_id) { asid = addr_space_id; }
- void setThread(unsigned tid) { threadNumber = tid; }
+ /** Sets the thread id. */
+ void setTid(unsigned tid) { threadNumber = tid; }
- void setState(ImplState *state) { thread = state; }
+ void setThreadState(ImplState *state) { thread = state; }
/** Returns the thread context.
*/