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| author | Andrea Mondelli <Andrea.Mondelli@ucf.edu> | 2019-03-01 09:38:18 -0500 |
|---|---|---|
| committer | Andrea Mondelli <Andrea.Mondelli@ucf.edu> | 2019-03-14 15:09:07 +0000 |
| commit | 8cedf1df11f7de007fddd24a6f313eb875ebd1e8 (patch) | |
| tree | fd34c0d80c02a19e602eed9ce09cbd475220f811 /src/cpu/base_dyn_inst.hh | |
| parent | 7f9cbfae9a091363ec46102cc3e693ac94b51493 (diff) | |
| download | gem5-8cedf1df11f7de007fddd24a6f313eb875ebd1e8.tar.xz | |
cpu: Refactor of Physical Register implementation
The implementation of the PhyRegId class is shared between multiple
cpu models. The o3/misc.hh should only be included in o3 models.
This patch removes the dependencies between different model
implementations, allowing to add new O3-like CPU model.
Change-Id: Ibb812517043befe75c48fab3ce9605a0d272870b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/16908
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Reviewed-by: Bradley Wang <radwang@ucdavis.edu>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/cpu/base_dyn_inst.hh')
| -rw-r--r-- | src/cpu/base_dyn_inst.hh | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/cpu/base_dyn_inst.hh b/src/cpu/base_dyn_inst.hh index 9a1ab062c..f1c782956 100644 --- a/src/cpu/base_dyn_inst.hh +++ b/src/cpu/base_dyn_inst.hh @@ -61,7 +61,6 @@ #include "cpu/exetrace.hh" #include "cpu/inst_res.hh" #include "cpu/inst_seq.hh" -#include "cpu/o3/comm.hh" #include "cpu/op_class.hh" #include "cpu/static_inst.hh" #include "cpu/translation.hh" |