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| author | Ali Saidi <saidi@eecs.umich.edu> | 2007-05-15 17:39:50 -0400 |
|---|---|---|
| committer | Ali Saidi <saidi@eecs.umich.edu> | 2007-05-15 17:39:50 -0400 |
| commit | f317227b4e5002b2c9d7c2e5068d317dcea5b0f9 (patch) | |
| tree | 57af4fc1e08ff1f1a323df24d1fe330d9705e9e2 /src/cpu/base_dyn_inst_impl.hh | |
| parent | fcf85725b5d2d67458c00680948d0a7baab942d4 (diff) | |
| download | gem5-f317227b4e5002b2c9d7c2e5068d317dcea5b0f9.tar.xz | |
hopefully the final hacky change to make the bus bridge work ok
cache blocks that get dmaed ARE NOT marked invalid in the caches so it's a performance issue here
src/mem/bridge.cc:
src/mem/bridge.hh:
hopefully the final hacky change to make the bus bridge work ok
--HG--
extra : convert_revision : 62cbc65c74d1a84199f0a376546ec19994c5899c
Diffstat (limited to 'src/cpu/base_dyn_inst_impl.hh')
0 files changed, 0 insertions, 0 deletions