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author | Iru Cai <mytbk920423@gmail.com> | 2019-02-28 17:07:16 +0800 |
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committer | Iru Cai <mytbk920423@gmail.com> | 2019-03-06 14:53:29 +0800 |
commit | 9e15a6822d0409ef08c1659229c2efb6bcf4d2ae (patch) | |
tree | eff5d40e8991fa7302fe73e1c6ecef8cf1503bd8 /src/cpu/base_dyn_inst_impl.hh | |
parent | 38a1e23c3910aa10c41478ba1715f50c4b4a8ac2 (diff) | |
download | gem5-9e15a6822d0409ef08c1659229c2efb6bcf4d2ae.tar.xz |
invisispec-1.0 source
Diffstat (limited to 'src/cpu/base_dyn_inst_impl.hh')
-rw-r--r-- | src/cpu/base_dyn_inst_impl.hh | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/src/cpu/base_dyn_inst_impl.hh b/src/cpu/base_dyn_inst_impl.hh index f55bd8ed5..f5bcff2df 100644 --- a/src/cpu/base_dyn_inst_impl.hh +++ b/src/cpu/base_dyn_inst_impl.hh @@ -87,6 +87,7 @@ void BaseDynInst<Impl>::initVars() { memData = NULL; + vldData = NULL; effAddr = 0; physEffAddrLow = 0; physEffAddrHigh = 0; @@ -132,6 +133,9 @@ BaseDynInst<Impl>::initVars() #endif reqToVerify = NULL; + postReq = NULL; + postSreqLow = NULL; + postSreqHigh = NULL; } template <class Impl> @@ -141,6 +145,10 @@ BaseDynInst<Impl>::~BaseDynInst() delete [] memData; } + if (vldData) { + delete [] vldData; + } + if (traceData) { delete traceData; } @@ -160,6 +168,19 @@ BaseDynInst<Impl>::~BaseDynInst() if (reqToVerify) delete reqToVerify; + + if (needDeletePostReq()){ + if (postReq){ + delete postReq; + postReq = NULL; + } + if (postSreqLow) { + delete postSreqLow; + delete postSreqHigh; + postSreqLow = NULL; + postSreqHigh = NULL; + } + } } #ifdef DEBUG |