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author | Gabe Black <gblack@eecs.umich.edu> | 2007-04-14 17:13:18 +0000 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2007-04-14 17:13:18 +0000 |
commit | c3081d9c1c36e1a08c173048783d191fa19463de (patch) | |
tree | f2717bd70d64af1e6ef54ff73e3cbee7984f4b31 /src/cpu/base_dyn_inst_impl.hh | |
parent | 5a3dcc172a9fd661330909815b163eb6f4d6a2d8 (diff) | |
download | gem5-c3081d9c1c36e1a08c173048783d191fa19463de.tar.xz |
Add support for microcode and pull out the special branch delay slot handling. Branch delay slots need to be squash on a mispredict as well because the nnpc they saw was incorrect.
--HG--
extra : convert_revision : 8b9c603616bcad254417a7a3fa3edfb4c8728719
Diffstat (limited to 'src/cpu/base_dyn_inst_impl.hh')
-rw-r--r-- | src/cpu/base_dyn_inst_impl.hh | 55 |
1 files changed, 51 insertions, 4 deletions
diff --git a/src/cpu/base_dyn_inst_impl.hh b/src/cpu/base_dyn_inst_impl.hh index a1c866336..acf8af9cf 100644 --- a/src/cpu/base_dyn_inst_impl.hh +++ b/src/cpu/base_dyn_inst_impl.hh @@ -62,19 +62,66 @@ my_hash_t thishash; #endif template <class Impl> -BaseDynInst<Impl>::BaseDynInst(TheISA::ExtMachInst machInst, +BaseDynInst<Impl>::BaseDynInst(StaticInstPtr _staticInst, Addr inst_PC, Addr inst_NPC, + Addr inst_MicroPC, Addr pred_PC, Addr pred_NPC, + Addr pred_MicroPC, InstSeqNum seq_num, ImplCPU *cpu) - : staticInst(machInst), traceData(NULL), cpu(cpu) + : staticInst(_staticInst), traceData(NULL), cpu(cpu) { seqNum = seq_num; + bool nextIsMicro = + staticInst->isMicroOp() && !staticInst->isLastMicroOp(); + PC = inst_PC; - nextPC = inst_NPC; - nextNPC = nextPC + sizeof(TheISA::MachInst); + microPC = inst_MicroPC; + if (nextIsMicro) { + nextPC = inst_PC; + nextNPC = inst_NPC; + nextMicroPC = microPC + 1; + } else { + nextPC = inst_NPC; + nextNPC = nextPC + sizeof(TheISA::MachInst); + nextMicroPC = 0; + } + predPC = pred_PC; + predNPC = pred_NPC; + predMicroPC = pred_MicroPC; + predTaken = false; + + initVars(); +} + +template <class Impl> +BaseDynInst<Impl>::BaseDynInst(TheISA::ExtMachInst inst, + Addr inst_PC, Addr inst_NPC, + Addr inst_MicroPC, + Addr pred_PC, Addr pred_NPC, + Addr pred_MicroPC, + InstSeqNum seq_num, ImplCPU *cpu) + : staticInst(inst), traceData(NULL), cpu(cpu) +{ + seqNum = seq_num; + + bool nextIsMicro = + staticInst->isMicroOp() && !staticInst->isLastMicroOp(); + + PC = inst_PC; + microPC = inst_MicroPC; + if (nextIsMicro) { + nextPC = inst_PC; + nextNPC = inst_NPC; + nextMicroPC = microPC + 1; + } else { + nextPC = inst_NPC; + nextNPC = nextPC + sizeof(TheISA::MachInst); + nextMicroPC = 0; + } predPC = pred_PC; predNPC = pred_NPC; + predMicroPC = pred_MicroPC; predTaken = false; initVars(); |