cpu: add a condition-code register class

Add a third register class for condition codes,
in parallel with the integer and FP classes.
No ISAs use the CC class at this point though.

1 files changed, 14 insertions, 0 deletions

diff --git a/src/cpu/checker/cpu.hh b/src/cpu/checker/cpu.hh
index 637481706..c49f264f9 100644
--- a/src/cpu/checker/cpu.hh
+++ b/src/cpu/checker/cpu.hh
@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2011 ARM Limited
+ * Copyright (c) 2013 Advanced Micro Devices, Inc.
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -223,6 +224,12 @@ class CheckerCPU : public BaseCPU
         return thread->readFloatRegBits(reg_idx);
     }
 
+    uint64_t readCCRegOperand(const StaticInst *si, int idx)
+    {
+        int reg_idx = si->srcRegIdx(idx) - TheISA::CC_Reg_Base;
+        return thread->readCCReg(reg_idx);
+    }
+
     template <class T>
     void setResult(T t)
     {
@@ -252,6 +259,13 @@ class CheckerCPU : public BaseCPU
         setResult<uint64_t>(val);
     }
 
+    void setCCRegOperand(const StaticInst *si, int idx, uint64_t val)
+    {
+        int reg_idx = si->destRegIdx(idx) - TheISA::CC_Reg_Base;
+        thread->setCCReg(reg_idx, val);
+        setResult<uint64_t>(val);
+    }
+
     bool readPredicate() { return thread->readPredicate(); }
     void setPredicate(bool val)
     {