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authorGabe Black <gblack@eecs.umich.edu>2011-11-18 01:33:28 -0800
committerGabe Black <gblack@eecs.umich.edu>2011-11-18 01:33:28 -0800
commitde21bb93ea4312a7e958698c634b16b10e02e21a (patch)
treec8aa7999dd0d5373c1de0d77eab7fd40f1d1a8fc /src/cpu/checker/cpu.hh
parentec32d85f9dbd2354dea330deb4e984a43d4dbe5d (diff)
downloadgem5-de21bb93ea4312a7e958698c634b16b10e02e21a.tar.xz
SE/FS: Get rid of FULL_SYSTEM in the CPU directory.
Diffstat (limited to 'src/cpu/checker/cpu.hh')
-rw-r--r--src/cpu/checker/cpu.hh20
1 files changed, 5 insertions, 15 deletions
diff --git a/src/cpu/checker/cpu.hh b/src/cpu/checker/cpu.hh
index 1e3a17a34..882575f89 100644
--- a/src/cpu/checker/cpu.hh
+++ b/src/cpu/checker/cpu.hh
@@ -46,25 +46,20 @@
#include "sim/eventq.hh"
// forward declarations
-#if FULL_SYSTEM
namespace TheISA
{
class TLB;
}
-class Processor;
-class PhysicalMemory;
-
-#else
-class Process;
-
-#endif // FULL_SYSTEM
template <class>
class BaseDynInst;
class CheckerCPUParams;
-class ThreadContext;
-class MemInterface;
class Checkpoint;
+class MemInterface;
+class PhysicalMemory;
+class Process;
+class Processor;
+class ThreadContext;
class Request;
/**
@@ -129,9 +124,7 @@ class CheckerCPU : public BaseCPU
TheISA::TLB *itb;
TheISA::TLB *dtb;
-#if FULL_SYSTEM
Addr dbg_vtophys(Addr addr);
-#endif
union Result {
uint64_t integer;
@@ -273,14 +266,11 @@ class CheckerCPU : public BaseCPU
this->dtb->demapPage(vaddr, asn);
}
-#if FULL_SYSTEM
Fault hwrei() { return thread->hwrei(); }
bool simPalCheck(int palFunc) { return thread->simPalCheck(palFunc); }
-#else
// Assume that the normal CPU's call to syscall was successful.
// The checker's state would have already been updated by the syscall.
void syscall(uint64_t callnum) { }
-#endif
void handleError()
{