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author | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2018-06-04 09:40:19 +0100 |
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committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2018-06-11 16:55:30 +0000 |
commit | f54020eb8155371725ab75b0fc5c419287eca084 (patch) | |
tree | 65d379f7603e689e083e9a58ff4c2e90abd19fbf /src/cpu/checker/cpu_impl.hh | |
parent | 2113b21996d086dab32b9fd388efe3df241bfbd2 (diff) | |
download | gem5-f54020eb8155371725ab75b0fc5c419287eca084.tar.xz |
misc: Using smart pointers for memory Requests
This patch is changing the underlying type for RequestPtr from Request*
to shared_ptr<Request>. Having memory requests being managed by smart
pointers will simplify the code; it will also prevent memory leakage and
dangling pointers.
Change-Id: I7749af38a11ac8eb4d53d8df1252951e0890fde3
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/10996
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Diffstat (limited to 'src/cpu/checker/cpu_impl.hh')
-rw-r--r-- | src/cpu/checker/cpu_impl.hh | 22 |
1 files changed, 10 insertions, 12 deletions
diff --git a/src/cpu/checker/cpu_impl.hh b/src/cpu/checker/cpu_impl.hh index d81858c14..57282cd13 100644 --- a/src/cpu/checker/cpu_impl.hh +++ b/src/cpu/checker/cpu_impl.hh @@ -244,16 +244,17 @@ Checker<Impl>::verify(DynInstPtr &completed_inst) // If not in the middle of a macro instruction if (!curMacroStaticInst) { // set up memory request for instruction fetch - memReq = new Request(unverifiedInst->threadNumber, fetch_PC, - sizeof(MachInst), - 0, - masterId, - fetch_PC, thread->contextId()); - memReq->setVirt(0, fetch_PC, sizeof(MachInst), - Request::INST_FETCH, masterId, thread->instAddr()); + auto mem_req = std::make_shared<Request>( + unverifiedInst->threadNumber, fetch_PC, + sizeof(MachInst), 0, masterId, fetch_PC, + thread->contextId()); + mem_req->setVirt(0, fetch_PC, sizeof(MachInst), + Request::INST_FETCH, masterId, + thread->instAddr()); - fault = itb->translateFunctional(memReq, tc, BaseTLB::Execute); + fault = itb->translateFunctional( + mem_req, tc, BaseTLB::Execute); if (fault != NoFault) { if (unverifiedInst->getFault() == NoFault) { @@ -270,7 +271,6 @@ Checker<Impl>::verify(DynInstPtr &completed_inst) advancePC(NoFault); // Give up on an ITB fault.. - delete memReq; unverifiedInst = NULL; return; } else { @@ -278,17 +278,15 @@ Checker<Impl>::verify(DynInstPtr &completed_inst) // the fault and see if our results match the CPU on // the next tick(). fault = unverifiedInst->getFault(); - delete memReq; break; } } else { - PacketPtr pkt = new Packet(memReq, MemCmd::ReadReq); + PacketPtr pkt = new Packet(mem_req, MemCmd::ReadReq); pkt->dataStatic(&machInst); icachePort->sendFunctional(pkt); machInst = gtoh(machInst); - delete memReq; delete pkt; } } |