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| author | Steve Reinhardt <steve.reinhardt@amd.com> | 2013-10-15 14:22:43 -0400 |
|---|---|---|
| committer | Steve Reinhardt <steve.reinhardt@amd.com> | 2013-10-15 14:22:43 -0400 |
| commit | 219c423f1fb0f9a559bfa87f9812426d5e2c3e29 (patch) | |
| tree | 7980ae867c4642e710af7cd5d0ad7fe51c0b6687 /src/cpu/checker/cpu_impl.hh | |
| parent | a830e63de71e5929b8ff8e334bc872faa9193a8b (diff) | |
| download | gem5-219c423f1fb0f9a559bfa87f9812426d5e2c3e29.tar.xz | |
cpu: rename *_DepTag constants to *_Reg_Base
Make these names more meaningful.
Specifically, made these substitutions:
s/FP_Base_DepTag/FP_Reg_Base/g;
s/Ctrl_Base_DepTag/Misc_Reg_Base/g;
s/Max_DepTag/Max_Reg_Index/g;
Diffstat (limited to 'src/cpu/checker/cpu_impl.hh')
| -rw-r--r-- | src/cpu/checker/cpu_impl.hh | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/checker/cpu_impl.hh b/src/cpu/checker/cpu_impl.hh index 1967e02f3..185fed88e 100644 --- a/src/cpu/checker/cpu_impl.hh +++ b/src/cpu/checker/cpu_impl.hh @@ -607,7 +607,7 @@ Checker<Impl>::copyResult(DynInstPtr &inst, uint64_t mismatch_val, thread->setFloatRegBits(idx, mismatch_val); break; case MiscRegClass: - thread->setMiscReg(idx - TheISA::Ctrl_Base_DepTag, + thread->setMiscReg(idx - TheISA::Misc_Reg_Base, mismatch_val); break; } @@ -626,7 +626,7 @@ Checker<Impl>::copyResult(DynInstPtr &inst, uint64_t mismatch_val, break; case MiscRegClass: // Try to get the proper misc register index for ARM here... - thread->setMiscReg(idx - TheISA::Ctrl_Base_DepTag, res); + thread->setMiscReg(idx - TheISA::Misc_Reg_Base, res); break; // else Register is out of range... } |