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authorGeoffrey Blake <Geoffrey.Blake@arm.com>2014-01-24 15:29:30 -0600
committerGeoffrey Blake <Geoffrey.Blake@arm.com>2014-01-24 15:29:30 -0600
commit9633282fc8f152ba897347d38fa85a7b374e3d1e (patch)
treeaa619c797ae5aad914639758c71b595cd71ac117 /src/cpu/checker/cpu_impl.hh
parent7d0344704a9ecc566d82ad43ec44b4becbaf4d77 (diff)
downloadgem5-9633282fc8f152ba897347d38fa85a7b374e3d1e.tar.xz
checker: CheckerCPU handling of MiscRegs was incorrect
The CheckerCPU model in pre-v8 code was not checking the updates to miscellaneous registers due to some methods for setting misc regs were not instrumented. The v8 patches exposed this by calling the instrumented misc reg update methods and then invoking the checker before the main CPU had updated its misc regs, leading to false positives about register mismatches. This patch fixes the non-instrumented misc reg update methods and places calls to the checker in the proper places in the O3 model.
Diffstat (limited to 'src/cpu/checker/cpu_impl.hh')
-rw-r--r--src/cpu/checker/cpu_impl.hh5
1 files changed, 0 insertions, 5 deletions
diff --git a/src/cpu/checker/cpu_impl.hh b/src/cpu/checker/cpu_impl.hh
index 23e9c103e..b6ec4f77b 100644
--- a/src/cpu/checker/cpu_impl.hh
+++ b/src/cpu/checker/cpu_impl.hh
@@ -230,11 +230,6 @@ Checker<Impl>::verify(DynInstPtr &completed_inst)
}
changedPC = false;
}
- if (changedNextPC) {
- DPRINTF(Checker, "Changed NextPC recently to %#x\n",
- thread->nextInstAddr());
- changedNextPC = false;
- }
// Try to fetch the instruction
uint64_t fetchOffset = 0;