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authorYasuko Eckert <yasuko.eckert@amd.com>2013-10-15 14:22:44 -0400
committerYasuko Eckert <yasuko.eckert@amd.com>2013-10-15 14:22:44 -0400
commit2c293823aa7cb6d2cac4c0ff35e2023ff132a8f2 (patch)
tree040fdd5bad814d7cb7ee40934974d2b38b28d67a /src/cpu/checker/thread_context.hh
parent552622184752dc798bc81f9b0b395db68aee9511 (diff)
downloadgem5-2c293823aa7cb6d2cac4c0ff35e2023ff132a8f2.tar.xz
cpu: add a condition-code register class
Add a third register class for condition codes, in parallel with the integer and FP classes. No ISAs use the CC class at this point though.
Diffstat (limited to 'src/cpu/checker/thread_context.hh')
-rw-r--r--src/cpu/checker/thread_context.hh17
1 files changed, 17 insertions, 0 deletions
diff --git a/src/cpu/checker/thread_context.hh b/src/cpu/checker/thread_context.hh
index 80726ff19..c06e03fc6 100644
--- a/src/cpu/checker/thread_context.hh
+++ b/src/cpu/checker/thread_context.hh
@@ -1,5 +1,6 @@
/*
* Copyright (c) 2011-2012 ARM Limited
+ * Copyright (c) 2013 Advanced Micro Devices, Inc.
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -216,6 +217,9 @@ class CheckerThreadContext : public ThreadContext
FloatRegBits readFloatRegBits(int reg_idx)
{ return actualTC->readFloatRegBits(reg_idx); }
+ CCReg readCCReg(int reg_idx)
+ { return actualTC->readCCReg(reg_idx); }
+
void setIntReg(int reg_idx, uint64_t val)
{
actualTC->setIntReg(reg_idx, val);
@@ -234,6 +238,12 @@ class CheckerThreadContext : public ThreadContext
checkerTC->setFloatRegBits(reg_idx, val);
}
+ void setCCReg(int reg_idx, CCReg val)
+ {
+ actualTC->setCCReg(reg_idx, val);
+ checkerTC->setCCReg(reg_idx, val);
+ }
+
/** Reads this thread's PC state. */
TheISA::PCState pcState()
{ return actualTC->pcState(); }
@@ -289,6 +299,7 @@ class CheckerThreadContext : public ThreadContext
int flattenIntIndex(int reg) { return actualTC->flattenIntIndex(reg); }
int flattenFloatIndex(int reg) { return actualTC->flattenFloatIndex(reg); }
+ int flattenCCIndex(int reg) { return actualTC->flattenCCIndex(reg); }
unsigned readStCondFailures()
{ return actualTC->readStCondFailures(); }
@@ -320,6 +331,12 @@ class CheckerThreadContext : public ThreadContext
void setFloatRegBitsFlat(int idx, FloatRegBits val)
{ actualTC->setFloatRegBitsFlat(idx, val); }
+
+ CCReg readCCRegFlat(int idx)
+ { return actualTC->readCCRegFlat(idx); }
+
+ void setCCRegFlat(int idx, CCReg val)
+ { actualTC->setCCRegFlat(idx, val); }
};
#endif // __CPU_CHECKER_EXEC_CONTEXT_HH__