diff options
| author | Gabe Black <gblack@eecs.umich.edu> | 2007-08-26 20:24:18 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-08-26 20:24:18 -0700 |
| commit | 537239b278f7b8171d2eb09ef7f99c332266c48f (patch) | |
| tree | 31984b63cc542f0a57ca96262477575ab0130c09 /src/cpu/checker/thread_context.hh | |
| parent | f738afb865cd82487d6300259d6e87fb50660d2a (diff) | |
| download | gem5-537239b278f7b8171d2eb09ef7f99c332266c48f.tar.xz | |
Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.
--HG--
extra : convert_revision : a04a30df0b6246e877a1cea35420dbac94b506b1
Diffstat (limited to 'src/cpu/checker/thread_context.hh')
| -rw-r--r-- | src/cpu/checker/thread_context.hh | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/cpu/checker/thread_context.hh b/src/cpu/checker/thread_context.hh index 3b4d21e13..15454c3fe 100644 --- a/src/cpu/checker/thread_context.hh +++ b/src/cpu/checker/thread_context.hh @@ -84,15 +84,15 @@ class CheckerThreadContext : public ThreadContext int readCpuId() { return actualTC->readCpuId(); } + TheISA::ITB *getITBPtr() { return actualTC->getITBPtr(); } + + TheISA::DTB *getDTBPtr() { return actualTC->getDTBPtr(); } + #if FULL_SYSTEM System *getSystemPtr() { return actualTC->getSystemPtr(); } PhysicalMemory *getPhysMemPtr() { return actualTC->getPhysMemPtr(); } - TheISA::ITB *getITBPtr() { return actualTC->getITBPtr(); } - - TheISA::DTB *getDTBPtr() { return actualTC->getDTBPtr(); } - TheISA::Kernel::Statistics *getKernelStats() { return actualTC->getKernelStats(); } |