cpu: implements vector registers

This adds a vector register type.  The type is defined as a std::array of a
fixed number of uint64_ts.  The isa_parser.py has been modified to parse vector
register operands and generate the required code.  Different cpus have vector
register files now.

1 files changed, 16 insertions, 0 deletions

diff --git a/src/cpu/checker/thread_context.hh b/src/cpu/checker/thread_context.hh
index 71c231ba0..436c97847 100644
--- a/src/cpu/checker/thread_context.hh
+++ b/src/cpu/checker/thread_context.hh
@@ -216,6 +216,9 @@ class CheckerThreadContext : public ThreadContext
     CCReg readCCReg(int reg_idx)
     { return actualTC->readCCReg(reg_idx); }
 
+    const VectorReg &readVectorReg(int reg_idx)
+    { return actualTC->readVectorReg(reg_idx); }
+
     void setIntReg(int reg_idx, uint64_t val)
     {
         actualTC->setIntReg(reg_idx, val);
@@ -240,6 +243,12 @@ class CheckerThreadContext : public ThreadContext
         checkerTC->setCCReg(reg_idx, val);
     }
 
+    void setVectorReg(int reg_idx, const VectorReg &val)
+    {
+        actualTC->setVectorReg(reg_idx, val);
+        checkerTC->setVectorReg(reg_idx, val);
+    }
+
     /** Reads this thread's PC state. */
     TheISA::PCState pcState()
     { return actualTC->pcState(); }
@@ -296,6 +305,7 @@ class CheckerThreadContext : public ThreadContext
     int flattenIntIndex(int reg) { return actualTC->flattenIntIndex(reg); }
     int flattenFloatIndex(int reg) { return actualTC->flattenFloatIndex(reg); }
     int flattenCCIndex(int reg) { return actualTC->flattenCCIndex(reg); }
+    int flattenVectorIndex(int reg) { return actualTC->flattenVectorIndex(reg); }
     int flattenMiscIndex(int reg) { return actualTC->flattenMiscIndex(reg); }
 
     unsigned readStCondFailures()
@@ -331,6 +341,12 @@ class CheckerThreadContext : public ThreadContext
 
     void setCCRegFlat(int idx, CCReg val)
     { actualTC->setCCRegFlat(idx, val); }
+
+    const VectorReg &readVectorRegFlat(int idx)
+    { return actualTC->readVectorRegFlat(idx); }
+
+    void setVectorRegFlat(int idx, const VectorReg &val)
+    { actualTC->setVectorRegFlat(idx, val); }
 };
 
 #endif // __CPU_CHECKER_EXEC_CONTEXT_HH__