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authorGabe Black <gblack@eecs.umich.edu>2009-04-08 22:21:27 -0700
committerGabe Black <gblack@eecs.umich.edu>2009-04-08 22:21:27 -0700
commit7b5a96f06b530db35637aca6f9d0f7a2ddfa6e60 (patch)
tree4c212f665de2628eac6f84d389de7a79b6d0b933 /src/cpu/checker/thread_context.hh
parent08043c777f1f05f5e14581950013461f328965be (diff)
downloadgem5-7b5a96f06b530db35637aca6f9d0f7a2ddfa6e60.tar.xz
tlb: Don't separate the TLB classes into an instruction TLB and a data TLB
Diffstat (limited to 'src/cpu/checker/thread_context.hh')
-rw-r--r--src/cpu/checker/thread_context.hh4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/checker/thread_context.hh b/src/cpu/checker/thread_context.hh
index 3c87f841f..6b21bf670 100644
--- a/src/cpu/checker/thread_context.hh
+++ b/src/cpu/checker/thread_context.hh
@@ -84,9 +84,9 @@ class CheckerThreadContext : public ThreadContext
int cpuId() { return actualTC->cpuId(); }
- TheISA::ITB *getITBPtr() { return actualTC->getITBPtr(); }
+ TheISA::TLB *getITBPtr() { return actualTC->getITBPtr(); }
- TheISA::DTB *getDTBPtr() { return actualTC->getDTBPtr(); }
+ TheISA::TLB *getDTBPtr() { return actualTC->getDTBPtr(); }
#if FULL_SYSTEM
System *getSystemPtr() { return actualTC->getSystemPtr(); }