CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5

Brings the CheckerCPU back to life to allow FS and SE checking of the
O3CPU.  These changes have only been tested with the ARM ISA.  Other
ISAs potentially require modification.

1 files changed, 80 insertions, 28 deletions

diff --git a/src/cpu/checker/thread_context.hh b/src/cpu/checker/thread_context.hh
index 4eb3eabfd..d66854b23 100644
--- a/src/cpu/checker/thread_context.hh
+++ b/src/cpu/checker/thread_context.hh
@@ -1,4 +1,16 @@
 /*
+ * Copyright (c) 2011 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder.  You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
  * Copyright (c) 2006 The Regents of The University of Michigan
  * All rights reserved.
  *
@@ -36,6 +48,7 @@
 #include "cpu/checker/cpu.hh"
 #include "cpu/simple_thread.hh"
 #include "cpu/thread_context.hh"
+#include "debug/Checker.hh"
 
 class EndQuiesceEvent;
 namespace TheISA {
@@ -77,21 +90,35 @@ class CheckerThreadContext : public ThreadContext
 
     BaseCPU *getCpuPtr() { return actualTC->getCpuPtr(); }
 
-    void setCpuId(int id)
+    int cpuId() { return actualTC->cpuId(); }
+
+    int contextId() { return actualTC->contextId(); }
+
+    void setContextId(int id)
     {
-        actualTC->setCpuId(id);
-        checkerTC->setCpuId(id);
+       actualTC->setContextId(id);
+       checkerTC->setContextId(id);
     }
 
-    int cpuId() { return actualTC->cpuId(); }
+    /** Returns this thread's ID number. */
+    int threadId() { return actualTC->threadId(); }
+    void setThreadId(int id)
+    {
+        checkerTC->setThreadId(id);
+        actualTC->setThreadId(id);
+    }
 
     TheISA::TLB *getITBPtr() { return actualTC->getITBPtr(); }
 
     TheISA::TLB *getDTBPtr() { return actualTC->getDTBPtr(); }
 
-#if FULL_SYSTEM
+    BaseCPU *getCheckerCpuPtr() { return checkerTC->getCpuPtr(); }
+
+    Decoder *getDecoderPtr() { return actualTC->getDecoderPtr(); }
+
     System *getSystemPtr() { return actualTC->getSystemPtr(); }
 
+#if FULL_SYSTEM
     PhysicalMemory *getPhysMemPtr() { return actualTC->getPhysMemPtr(); }
 
     TheISA::Kernel::Statistics *getKernelStats()
@@ -101,10 +128,23 @@ class CheckerThreadContext : public ThreadContext
 
     FSTranslatingPortProxy* getVirtProxy()
     { return actualTC->getVirtProxy(); }
+
+    //XXX: How does this work now?
+    void initMemProxies(ThreadContext *tc)
+    { actualTC->initMemProxies(tc); }
+
+    void connectMemPorts(ThreadContext *tc)
+    {
+        actualTC->connectMemPorts(tc);
+    }
 #else
     SETranslatingPortProxy* getMemProxy() { return actualTC->getMemProxy(); }
 
     Process *getProcessPtr() { return actualTC->getProcessPtr(); }
+
+    /** Executes a syscall in SE mode. */
+    void syscall(int64_t callnum)
+    { return actualTC->syscall(callnum); }
 #endif
 
     Status status() const { return actualTC->status(); }
@@ -120,10 +160,10 @@ class CheckerThreadContext : public ThreadContext
     void activate(int delay = 1) { actualTC->activate(delay); }
 
     /// Set the status to Suspended.
-    void suspend() { actualTC->suspend(); }
+    void suspend(int delay) { actualTC->suspend(delay); }
 
     /// Set the status to Halted.
-    void halt() { actualTC->halt(); }
+    void halt(int delay) { actualTC->halt(delay); }
 
 #if FULL_SYSTEM
     void dumpFuncProfile() { actualTC->dumpFuncProfile(); }
@@ -135,7 +175,11 @@ class CheckerThreadContext : public ThreadContext
         checkerTC->copyState(oldContext);
     }
 
-    void regStats(const std::string &name) { actualTC->regStats(name); }
+    void regStats(const std::string &name)
+    {
+        actualTC->regStats(name);
+        checkerTC->regStats(name);
+    }
 
     void serialize(std::ostream &os) { actualTC->serialize(os); }
     void unserialize(Checkpoint *cp, const std::string &section)
@@ -151,8 +195,6 @@ class CheckerThreadContext : public ThreadContext
     void profileSample() { return actualTC->profileSample(); }
 #endif
 
-    int threadId() { return actualTC->threadId(); }
-
     // @todo: Do I need this?
     void copyArchRegs(ThreadContext *tc)
     {
@@ -196,32 +238,36 @@ class CheckerThreadContext : public ThreadContext
         checkerTC->setFloatRegBits(reg_idx, val);
     }
 
-    uint64_t readPC() { return actualTC->readPC(); }
+    /** Reads this thread's PC state. */
+    TheISA::PCState pcState()
+    { return actualTC->pcState(); }
 
-    void setPC(uint64_t val)
+    /** Sets this thread's PC state. */
+    void pcState(const TheISA::PCState &val)
     {
-        actualTC->setPC(val);
-        checkerTC->setPC(val);
+        DPRINTF(Checker, "Changing PC to %s, old PC %s\n",
+                         val, checkerTC->pcState());
+        checkerTC->pcState(val);
         checkerCPU->recordPCChange(val);
+        return actualTC->pcState(val);
     }
 
-    uint64_t readNextPC() { return actualTC->readNextPC(); }
-
-    void setNextPC(uint64_t val)
+    void pcStateNoRecord(const TheISA::PCState &val)
     {
-        actualTC->setNextPC(val);
-        checkerTC->setNextPC(val);
-        checkerCPU->recordNextPCChange(val);
+        return actualTC->pcState(val);
     }
 
-    uint64_t readNextNPC() { return actualTC->readNextNPC(); }
+    /** Reads this thread's PC. */
+    Addr instAddr()
+    { return actualTC->instAddr(); }
 
-    void setNextNPC(uint64_t val)
-    {
-        actualTC->setNextNPC(val);
-        checkerTC->setNextNPC(val);
-        checkerCPU->recordNextPCChange(val);
-    }
+    /** Reads this thread's next PC. */
+    Addr nextInstAddr()
+    { return actualTC->nextInstAddr(); }
+
+    /** Reads this thread's next PC. */
+    MicroPC microPC()
+    { return actualTC->microPC(); }
 
     MiscReg readMiscRegNoEffect(int misc_reg)
     { return actualTC->readMiscRegNoEffect(misc_reg); }
@@ -231,22 +277,28 @@ class CheckerThreadContext : public ThreadContext
 
     void setMiscRegNoEffect(int misc_reg, const MiscReg &val)
     {
+        DPRINTF(Checker, "Setting misc reg with no effect: %d to both Checker"
+                         " and O3..\n", misc_reg);
         checkerTC->setMiscRegNoEffect(misc_reg, val);
         actualTC->setMiscRegNoEffect(misc_reg, val);
     }
 
     void setMiscReg(int misc_reg, const MiscReg &val)
     {
+        DPRINTF(Checker, "Setting misc reg with effect: %d to both Checker"
+                         " and O3..\n", misc_reg);
         checkerTC->setMiscReg(misc_reg, val);
         actualTC->setMiscReg(misc_reg, val);
     }
 
+    int flattenIntIndex(int reg) { return actualTC->flattenIntIndex(reg); }
+    int flattenFloatIndex(int reg) { return actualTC->flattenFloatIndex(reg); }
+
     unsigned readStCondFailures()
     { return actualTC->readStCondFailures(); }
 
     void setStCondFailures(unsigned sc_failures)
     {
-        checkerTC->setStCondFailures(sc_failures);
         actualTC->setStCondFailures(sc_failures);
     }