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authorAndreas Sandberg <Andreas.Sandberg@ARM.com>2015-02-11 10:23:27 -0500
committerAndreas Sandberg <Andreas.Sandberg@ARM.com>2015-02-11 10:23:27 -0500
commit550c31849024a2184887df87aae39617ebfe0d6a (patch)
tree53cc5e91d0961b0215c614141fdc380b30c76951 /src/cpu/checker
parent9e6f803254cbf3f5f491775debdc6593c3329da8 (diff)
downloadgem5-550c31849024a2184887df87aae39617ebfe0d6a.tar.xz
sim: Move the BaseTLB to src/arch/generic/
The TLB-related code is generally architecture dependent and should live in the arch directory to signify that. --HG-- rename : src/sim/BaseTLB.py => src/arch/generic/BaseTLB.py rename : src/sim/tlb.cc => src/arch/generic/tlb.cc rename : src/sim/tlb.hh => src/arch/generic/tlb.hh
Diffstat (limited to 'src/cpu/checker')
-rw-r--r--src/cpu/checker/cpu.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/checker/cpu.cc b/src/cpu/checker/cpu.cc
index d6a8bd032..229066fcc 100644
--- a/src/cpu/checker/cpu.cc
+++ b/src/cpu/checker/cpu.cc
@@ -44,6 +44,7 @@
#include <list>
#include <string>
+#include "arch/generic/tlb.hh"
#include "arch/kernel_stats.hh"
#include "arch/vtophys.hh"
#include "cpu/checker/cpu.hh"
@@ -53,7 +54,6 @@
#include "cpu/thread_context.hh"
#include "params/CheckerCPU.hh"
#include "sim/full_system.hh"
-#include "sim/tlb.hh"
using namespace std;
using namespace TheISA;