make BaseCPU the provider of _cpuId, and cpuId() instead of being scattered

across the subclasses. generally make it so that member data is _cpuId and
accessor functions are cpuId(). The ID val comes from the python (default -1 if
none provided), and if it is -1, the index of cpuList will be given. this has
passed util/regress quick and se.py -n4 and fs.py -n4 as well as standard
switch.

2 files changed, 2 insertions, 2 deletions

diff --git a/src/cpu/checker/cpu_impl.hh b/src/cpu/checker/cpu_impl.hh
index 33c70569a..9f6fa2b6d 100644
--- a/src/cpu/checker/cpu_impl.hh
+++ b/src/cpu/checker/cpu_impl.hh
@@ -152,7 +152,7 @@ Checker<DynInstPtr>::verify(DynInstPtr &completed_inst)
         memReq = new Request(inst->threadNumber, fetch_PC,
                              sizeof(uint32_t),
                              IFETCH_FLAGS(thread->readPC()),
-                             fetch_PC, thread->readCpuId(), inst->threadNumber);
+                             fetch_PC, thread->cpuId(), inst->threadNumber);
 
         bool succeeded = translateInstReq(memReq);
 
diff --git a/src/cpu/checker/thread_context.hh b/src/cpu/checker/thread_context.hh
index 75ac959db..a74de20b9 100644
--- a/src/cpu/checker/thread_context.hh
+++ b/src/cpu/checker/thread_context.hh
@@ -82,7 +82,7 @@ class CheckerThreadContext : public ThreadContext
         checkerTC->setCpuId(id);
     }
 
-    int readCpuId() { return actualTC->readCpuId(); }
+    int cpuId() { return actualTC->cpuId(); }
 
     TheISA::ITB *getITBPtr() { return actualTC->getITBPtr(); }