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authorAli Saidi <saidi@eecs.umich.edu>2007-03-07 15:04:31 -0500
committerAli Saidi <saidi@eecs.umich.edu>2007-03-07 15:04:31 -0500
commit689cab36c90b56b3c8a7cda16d758acdd89f9de1 (patch)
tree2f0115320e0a6cfd13e5b054baa0ca13d5655519 /src/cpu/checker
parent329db76e47c825d4ecbe0f5251dbcfaf2ec09516 (diff)
downloadgem5-689cab36c90b56b3c8a7cda16d758acdd89f9de1.tar.xz
*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
--HG-- extra : convert_revision : f799b65f1b2a6bf43605e6870b0f39b473dc492b
Diffstat (limited to 'src/cpu/checker')
-rw-r--r--src/cpu/checker/cpu.hh16
-rw-r--r--src/cpu/checker/cpu_impl.hh10
-rw-r--r--src/cpu/checker/thread_context.hh16
3 files changed, 21 insertions, 21 deletions
diff --git a/src/cpu/checker/cpu.hh b/src/cpu/checker/cpu.hh
index 3e08193ee..7b3628986 100644
--- a/src/cpu/checker/cpu.hh
+++ b/src/cpu/checker/cpu.hh
@@ -298,27 +298,27 @@ class CheckerCPU : public BaseCPU
thread->setNextPC(val);
}
- MiscReg readMiscReg(int misc_reg)
+ MiscReg readMiscRegNoEffect(int misc_reg)
{
- return thread->readMiscReg(misc_reg);
+ return thread->readMiscRegNoEffect(misc_reg);
}
- MiscReg readMiscRegWithEffect(int misc_reg)
+ MiscReg readMiscReg(int misc_reg)
{
- return thread->readMiscRegWithEffect(misc_reg);
+ return thread->readMiscReg(misc_reg);
}
- void setMiscReg(int misc_reg, const MiscReg &val)
+ void setMiscRegNoEffect(int misc_reg, const MiscReg &val)
{
result.integer = val;
miscRegIdxs.push(misc_reg);
- return thread->setMiscReg(misc_reg, val);
+ return thread->setMiscRegNoEffect(misc_reg, val);
}
- void setMiscRegWithEffect(int misc_reg, const MiscReg &val)
+ void setMiscReg(int misc_reg, const MiscReg &val)
{
miscRegIdxs.push(misc_reg);
- return thread->setMiscRegWithEffect(misc_reg, val);
+ return thread->setMiscReg(misc_reg, val);
}
void recordPCChange(uint64_t val) { changedPC = true; newPC = val; }
diff --git a/src/cpu/checker/cpu_impl.hh b/src/cpu/checker/cpu_impl.hh
index 56e13dd1e..f3f8a0bb3 100644
--- a/src/cpu/checker/cpu_impl.hh
+++ b/src/cpu/checker/cpu_impl.hh
@@ -386,13 +386,13 @@ Checker<DynInstPtr>::validateExecution(DynInstPtr &inst)
int misc_reg_idx = miscRegIdxs.front();
miscRegIdxs.pop();
- if (inst->tcBase()->readMiscReg(misc_reg_idx) !=
- thread->readMiscReg(misc_reg_idx)) {
+ if (inst->tcBase()->readMiscRegNoEffect(misc_reg_idx) !=
+ thread->readMiscRegNoEffect(misc_reg_idx)) {
warn("%lli: Misc reg idx %i (side effect) does not match! "
"Inst: %#x, checker: %#x",
curTick, misc_reg_idx,
- inst->tcBase()->readMiscReg(misc_reg_idx),
- thread->readMiscReg(misc_reg_idx));
+ inst->tcBase()->readMiscRegNoEffect(misc_reg_idx),
+ thread->readMiscRegNoEffect(misc_reg_idx));
handleError(inst);
}
}
@@ -432,7 +432,7 @@ Checker<DynInstPtr>::copyResult(DynInstPtr &inst)
} else if (idx < TheISA::Fpcr_DepTag) {
thread->setFloatRegBits(idx, inst->readIntResult());
} else {
- thread->setMiscReg(idx, inst->readIntResult());
+ thread->setMiscRegNoEffect(idx, inst->readIntResult());
}
}
diff --git a/src/cpu/checker/thread_context.hh b/src/cpu/checker/thread_context.hh
index cf36d8392..3b4d21e13 100644
--- a/src/cpu/checker/thread_context.hh
+++ b/src/cpu/checker/thread_context.hh
@@ -248,11 +248,17 @@ class CheckerThreadContext : public ThreadContext
checkerCPU->recordNextPCChange(val);
}
+ MiscReg readMiscRegNoEffect(int misc_reg)
+ { return actualTC->readMiscRegNoEffect(misc_reg); }
+
MiscReg readMiscReg(int misc_reg)
{ return actualTC->readMiscReg(misc_reg); }
- MiscReg readMiscRegWithEffect(int misc_reg)
- { return actualTC->readMiscRegWithEffect(misc_reg); }
+ void setMiscRegNoEffect(int misc_reg, const MiscReg &val)
+ {
+ checkerTC->setMiscRegNoEffect(misc_reg, val);
+ actualTC->setMiscRegNoEffect(misc_reg, val);
+ }
void setMiscReg(int misc_reg, const MiscReg &val)
{
@@ -260,12 +266,6 @@ class CheckerThreadContext : public ThreadContext
actualTC->setMiscReg(misc_reg, val);
}
- void setMiscRegWithEffect(int misc_reg, const MiscReg &val)
- {
- checkerTC->setMiscRegWithEffect(misc_reg, val);
- actualTC->setMiscRegWithEffect(misc_reg, val);
- }
-
unsigned readStCondFailures()
{ return actualTC->readStCondFailures(); }