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authorGabe Black <gblack@eecs.umich.edu>2012-05-26 13:44:46 -0700
committerGabe Black <gblack@eecs.umich.edu>2012-05-26 13:44:46 -0700
commit0cba96ba6a5d7a4dab2a63b14149c49dfbfbb3bc (patch)
tree1e4e1372b76ed021060d560c2ee1a474f4b22ef0 /src/cpu/checker
parenteae1e97fb002b44a9d8c46df2da1ddc1d0156ce4 (diff)
downloadgem5-0cba96ba6a5d7a4dab2a63b14149c49dfbfbb3bc.tar.xz
CPU: Merge the predecoder and decoder.
These classes are always used together, and merging them will give the ISAs more flexibility in how they cache things and manage the process. --HG-- rename : src/arch/x86/predecoder_tables.cc => src/arch/x86/decoder_tables.cc
Diffstat (limited to 'src/cpu/checker')
-rw-r--r--src/cpu/checker/cpu.hh8
-rw-r--r--src/cpu/checker/cpu_impl.hh38
2 files changed, 14 insertions, 32 deletions
diff --git a/src/cpu/checker/cpu.hh b/src/cpu/checker/cpu.hh
index d816578ae..72dc2ce3e 100644
--- a/src/cpu/checker/cpu.hh
+++ b/src/cpu/checker/cpu.hh
@@ -47,7 +47,6 @@
#include <map>
#include <queue>
-#include "arch/predecoder.hh"
#include "arch/types.hh"
#include "base/statistics.hh"
#include "cpu/base.hh"
@@ -156,9 +155,6 @@ class CheckerCPU : public BaseCPU
// keep them all in a std::queue
std::queue<Result> result;
- // current instruction
- TheISA::MachInst machInst;
-
// Pointer to the one memory request.
RequestPtr memReq;
@@ -401,8 +397,7 @@ class Checker : public CheckerCPU
public:
Checker(Params *p)
- : CheckerCPU(p), updateThisCycle(false), unverifiedInst(NULL),
- predecoder(NULL)
+ : CheckerCPU(p), updateThisCycle(false), unverifiedInst(NULL)
{ }
void switchOut();
@@ -434,7 +429,6 @@ class Checker : public CheckerCPU
bool updateThisCycle;
DynInstPtr unverifiedInst;
- TheISA::Predecoder predecoder;
std::list<DynInstPtr> instList;
typedef typename std::list<DynInstPtr>::iterator InstListIt;
diff --git a/src/cpu/checker/cpu_impl.hh b/src/cpu/checker/cpu_impl.hh
index dcc6b01f9..40f1cef6a 100644
--- a/src/cpu/checker/cpu_impl.hh
+++ b/src/cpu/checker/cpu_impl.hh
@@ -69,7 +69,7 @@ Checker<Impl>::advancePC(Fault fault)
if (fault != NoFault) {
curMacroStaticInst = StaticInst::nullStaticInstPtr;
fault->invoke(tc, curStaticInst);
- predecoder.reset();
+ thread->decoder.reset();
} else {
if (curStaticInst) {
if (curStaticInst->isLastMicroop())
@@ -113,7 +113,7 @@ Checker<Impl>::handlePendingInt()
"a non-interuptable instruction!", curTick());
}
boundaryInst = NULL;
- predecoder.reset();
+ thread->decoder.reset();
curMacroStaticInst = StaticInst::nullStaticInstPtr;
}
@@ -239,6 +239,8 @@ Checker<Impl>::verify(DynInstPtr &completed_inst)
Addr fetch_PC = thread->instAddr();
fetch_PC = (fetch_PC & PCMask) + fetchOffset;
+ MachInst machInst;
+
// If not in the middle of a macro instruction
if (!curMacroStaticInst) {
// set up memory request for instruction fetch
@@ -304,24 +306,18 @@ Checker<Impl>::verify(DynInstPtr &completed_inst)
StaticInstPtr instPtr = NULL;
//Predecode, ie bundle up an ExtMachInst
- predecoder.setTC(thread->getTC());
+ thread->decoder.setTC(thread->getTC());
//If more fetch data is needed, pass it in.
Addr fetchPC = (pcState.instAddr() & PCMask) + fetchOffset;
- predecoder.moreBytes(pcState, fetchPC, machInst);
+ thread->decoder.moreBytes(pcState, fetchPC, machInst);
//If an instruction is ready, decode it.
//Otherwise, we'll have to fetch beyond the
//MachInst at the current pc.
- if (predecoder.extMachInstReady()) {
+ if (thread->decoder.instReady()) {
fetchDone = true;
- ExtMachInst newMachInst =
- predecoder.getExtMachInst(pcState);
+ instPtr = thread->decoder.decode(pcState);
thread->pcState(pcState);
- instPtr = thread->decoder.decode(newMachInst,
- pcState.instAddr());
-#if THE_ISA != X86_ISA
- machInst = newMachInst;
-#endif
} else {
fetchDone = false;
fetchOffset += sizeof(TheISA::MachInst);
@@ -344,8 +340,8 @@ Checker<Impl>::verify(DynInstPtr &completed_inst)
}
}
}
- // reset predecoder on Checker
- predecoder.reset();
+ // reset decoder on Checker
+ thread->decoder.reset();
// Check Checker and CPU get same instruction, and record
// any faults the CPU may have had.
@@ -477,17 +473,9 @@ Checker<Impl>::validateInst(DynInstPtr &inst)
}
}
-
- MachInst mi;
-#if THE_ISA != X86_ISA
- mi = static_cast<MachInst>(inst->staticInst->machInst);
-#endif
-
- if (mi != machInst) {
- panic("%lli: Binary instructions do not match! Inst: %#x, "
- "checker: %#x",
- curTick(), mi, machInst);
- handleError(inst);
+ if (curStaticInst != inst->staticInst) {
+ warn("%lli: StaticInstPtrs don't match. (%s, %s).\n", curTick(),
+ curStaticInst->getName(), inst->staticInst->getName());
}
}