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| author | Gabe Black <gblack@eecs.umich.edu> | 2009-04-19 04:25:01 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2009-04-19 04:25:01 -0700 |
| commit | 3e5f4876630169e92b3ad736d747bcba1b79c062 (patch) | |
| tree | cc6f7aa2f13331839567c1b5844ea2d8412df163 /src/cpu/checker | |
| parent | ca8598147835cc3bf4cb6125b4f32cbd941f1ae7 (diff) | |
| download | gem5-3e5f4876630169e92b3ad736d747bcba1b79c062.tar.xz | |
Memory: Rename LOCKED for load locked store conditional to LLSC.
Diffstat (limited to 'src/cpu/checker')
| -rw-r--r-- | src/cpu/checker/cpu.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/checker/cpu.cc b/src/cpu/checker/cpu.cc index 1c36ad22d..4305f7ab0 100644 --- a/src/cpu/checker/cpu.cc +++ b/src/cpu/checker/cpu.cc @@ -240,8 +240,8 @@ CheckerCPU::write(T data, Addr addr, unsigned flags, uint64_t *res) // verify this data. if (unverifiedReq && !(unverifiedReq->isUncacheable()) && - (!(unverifiedReq->isLocked()) || - ((unverifiedReq->isLocked()) && + (!(unverifiedReq->isLlsc()) || + ((unverifiedReq->isLlsc()) && unverifiedReq->getExtraData() == 1))) { T inst_data; /* |