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| author | Ali Saidi <saidi@eecs.umich.edu> | 2006-07-05 20:30:45 -0400 |
|---|---|---|
| committer | Ali Saidi <saidi@eecs.umich.edu> | 2006-07-05 20:30:45 -0400 |
| commit | b36796914af8bfc6729cc8a519e57572460e43e8 (patch) | |
| tree | 1886edde38b2da28cb45f4e13135b1993502f45d /src/cpu/cpu_models.py | |
| parent | f456360bbcd6e4e4fd1550e96658934affac3eb9 (diff) | |
| parent | 4201ec84b2dd7d96148bf661124dd7b5d0e7204b (diff) | |
| download | gem5-b36796914af8bfc6729cc8a519e57572460e43e8.tar.xz | |
Merge zizzer:/bk/newmem
into zeep.pool:/z/saidi/work/m5.newmem.head
--HG--
extra : convert_revision : a64362d3cf8de00c97bea25118fee33cffe22707
Diffstat (limited to 'src/cpu/cpu_models.py')
| -rw-r--r-- | src/cpu/cpu_models.py | 33 |
1 files changed, 29 insertions, 4 deletions
diff --git a/src/cpu/cpu_models.py b/src/cpu/cpu_models.py index 8d0a15f61..1add32745 100644 --- a/src/cpu/cpu_models.py +++ b/src/cpu/cpu_models.py @@ -23,6 +23,12 @@ # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Authors: Steve Reinhardt + +import os +import os.path +import sys ################ # CpuModel class @@ -45,7 +51,6 @@ class CpuModel: # Add self to dict CpuModel.dict[name] = self - # # Define CPU models. # @@ -65,7 +70,27 @@ CpuModel('TimingSimpleCPU', 'timing_simple_cpu_exec.cc', CpuModel('FullCPU', 'full_cpu_exec.cc', '#include "encumbered/cpu/full/dyn_inst.hh"', { 'CPU_exec_context': 'DynInst' }) -CpuModel('AlphaFullCPU', 'alpha_o3_exec.cc', - '#include "cpu/o3/alpha_dyn_inst.hh"', - { 'CPU_exec_context': 'AlphaDynInst<AlphaSimpleImpl>' }) +CpuModel('OzoneSimpleCPU', 'ozone_simple_exec.cc', + '#include "cpu/ozone/dyn_inst.hh"', + { 'CPU_exec_context': 'OzoneDynInst<SimpleImpl>' }) +CpuModel('OzoneCPU', 'ozone_exec.cc', + '#include "cpu/ozone/dyn_inst.hh"', + { 'CPU_exec_context': 'OzoneDynInst<OzoneImpl>' }) +CpuModel('CheckerCPU', 'checker_cpu_exec.cc', + '#include "cpu/checker/cpu.hh"', + { 'CPU_exec_context': 'CheckerCPU' }) + +# Maybe there is a more clever way to determine ISA +# here but since the environment variable isnt passed through +# here the easiest way is this... +sub_template = 'not found' +for argument in sys.argv: + if 'ALPHA' in argument: + sub_template = 'AlphaDynInst<AlphaSimpleImpl>' + +if sub_template == 'not found': + sys.exit('NO CPU_exec_context substitution defined for this ISA') +CpuModel('O3CPU', 'o3_cpu_exec.cc', + '#include "cpu/o3/isa_specific.hh"', + { 'CPU_exec_context': sub_template }) |