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| author | Kevin Lim <ktlim@umich.edu> | 2006-06-09 11:46:35 -0400 |
|---|---|---|
| committer | Kevin Lim <ktlim@umich.edu> | 2006-06-09 11:46:35 -0400 |
| commit | 068379a9ed22bc00b9544e33b382da8d9aebc13a (patch) | |
| tree | cea0e4a49d9df0338195825f8105e763c865f676 /src/cpu/cpu_models.py | |
| parent | f5b6aef154c39b7d0a6c8badac5bb40daa0a0827 (diff) | |
| download | gem5-068379a9ed22bc00b9544e33b382da8d9aebc13a.tar.xz | |
Fixes for some outstanding issues in the LSQ. It should now be able to retry. It should also be able to handle LL/SC (through hacks) for the UP case.
src/cpu/o3/lsq_unit.hh:
Handle being able to retry (untested but hopefully very close to working).
Handle lock flag for LL/SC hack. Hopefully the memory system will add in LL/SC soon.
Better output message.
src/cpu/o3/lsq_unit_impl.hh:
Handle being able to retry (untested but should be very close to working).
Make SC's work (hopefully) while the memory system doesn't have a LL/SC implementation.
--HG--
extra : convert_revision : bffa721b21405c88a9c6b3d9b9080957f8a2638f
Diffstat (limited to 'src/cpu/cpu_models.py')
0 files changed, 0 insertions, 0 deletions