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authorRekai Gonzalez-Alberquilla <Rekai.GonzalezAlberquilla@arm.com>2017-04-05 13:14:34 -0500
committerAndreas Sandberg <andreas.sandberg@arm.com>2017-07-05 14:43:49 +0000
commita473b5a6eb269cc303ecfb5e5643d891a5d255d9 (patch)
tree4fde47e5c62c566f81d13f6e90ad98cca781ff6e /src/cpu/exec_context.hh
parent43d833246fcfe092a0c08dde1fdf7e3d409d1af9 (diff)
downloadgem5-a473b5a6eb269cc303ecfb5e5643d891a5d255d9.tar.xz
cpu: Simplify the rename interface and use RegId
With the hierarchical RegId there are a lot of functions that are redundant now. The idea behind the simplification is that instead of having the regId, telling which kind of register read/write/rename/lookup/etc. and then the function panic_if'ing if the regId is not of the appropriate type, we provide an interface that decides what kind of register to read depending on the register type of the given regId. Change-Id: I7d52e9e21fc01205ae365d86921a4ceb67a57178 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> [ Fix RISCV build issues ] Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2702
Diffstat (limited to 'src/cpu/exec_context.hh')
-rw-r--r--src/cpu/exec_context.hh4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/exec_context.hh b/src/cpu/exec_context.hh
index 1b6084e27..d33147240 100644
--- a/src/cpu/exec_context.hh
+++ b/src/cpu/exec_context.hh
@@ -287,9 +287,9 @@ class ExecContext {
*/
#if THE_ISA == MIPS_ISA
- virtual MiscReg readRegOtherThread(RegId reg,
+ virtual MiscReg readRegOtherThread(const RegId& reg,
ThreadID tid = InvalidThreadID) = 0;
- virtual void setRegOtherThread(RegId reg, MiscReg val,
+ virtual void setRegOtherThread(const RegId& reg, MiscReg val,
ThreadID tid = InvalidThreadID) = 0;
#endif