diff options
author | Gabe Black <gblack@eecs.umich.edu> | 2007-01-27 01:59:20 -0500 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2007-01-27 01:59:20 -0500 |
commit | 0358ccee23072eef0b6448e3170457037682a452 (patch) | |
tree | 378b5ba325d74536092a7f245423d81274db38b4 /src/cpu/exetrace.cc | |
parent | e41f54f97f9ebdea32cc6498c346636cddc9e06d (diff) | |
parent | 5c7bf74c073d0aea808046d10dfcaa6c319217a3 (diff) | |
download | gem5-0358ccee23072eef0b6448e3170457037682a452.tar.xz |
Merge zizzer:/bk/newmem
into zower.eecs.umich.edu:/eecshome/m5/newmem
src/arch/sparc/isa/formats/mem/util.isa:
src/arch/sparc/isa_traits.hh:
src/arch/sparc/system.cc:
Hand Merge
--HG--
extra : convert_revision : d5e0c97caebb616493e2f642e915969d7028109c
Diffstat (limited to 'src/cpu/exetrace.cc')
-rw-r--r-- | src/cpu/exetrace.cc | 54 |
1 files changed, 29 insertions, 25 deletions
diff --git a/src/cpu/exetrace.cc b/src/cpu/exetrace.cc index 23291825d..bfd701271 100644 --- a/src/cpu/exetrace.cc +++ b/src/cpu/exetrace.cc @@ -295,7 +295,8 @@ Trace::InstRecord::dump(ostream &outs) bool diffPC = false; bool diffCC = false; bool diffInst = false; - bool diffRegs = false; + bool diffIntRegs = false; + bool diffFpRegs = false; bool diffTpc = false; bool diffTnpc = false; bool diffTstate = false; @@ -359,10 +360,15 @@ Trace::InstRecord::dump(ostream &outs) } for (int i = 0; i < TheISA::NumIntArchRegs; i++) { if (thread->readIntReg(i) != shared_data->intregs[i]) { - diffRegs = true; + diffIntRegs = true; } } - uint64_t oldTl = thread->readMiscReg(MISCREG_TL); + for (int i = 0; i < TheISA::NumFloatRegs/2; i++) { + if (thread->readFloatRegBits(i,FloatRegFile::DoubleWidth) != shared_data->fpregs[i]) { + diffFpRegs = true; + } + } + uint64_t oldTl = thread->readMiscReg(MISCREG_TL); if (oldTl != shared_data->tl) diffTl = true; for (int i = 1; i <= MaxTL; i++) { @@ -440,12 +446,12 @@ Trace::InstRecord::dump(ostream &outs) diffTlb = true; } - if ((diffPC || diffCC || diffInst || diffRegs || diffTpc || - diffTnpc || diffTstate || diffTt || diffHpstate || - diffHtstate || diffHtba || diffPstate || diffY || - diffCcr || diffTl || diffGl || diffAsi || diffPil || - diffCwp || diffCansave || diffCanrestore || - diffOtherwin || diffCleanwin || diffTlb) + if ((diffPC || diffCC || diffInst || diffIntRegs || + diffFpRegs || diffTpc || diffTnpc || diffTstate || + diffTt || diffHpstate || diffHtstate || diffHtba || + diffPstate || diffY || diffCcr || diffTl || diffGl || + diffAsi || diffPil || diffCwp || diffCansave || + diffCanrestore || diffOtherwin || diffCleanwin || diffTlb) && !((staticInst->machInst & 0xC1F80000) == 0x81D00000) && !(((staticInst->machInst & 0xC0000000) == 0xC0000000) && shared_data->tl == thread->readMiscReg(MISCREG_TL) + 1) @@ -458,8 +464,10 @@ Trace::InstRecord::dump(ostream &outs) outs << " [CC]"; if (diffInst) outs << " [Instruction]"; - if (diffRegs) + if (diffIntRegs) outs << " [IntRegs]"; + if (diffFpRegs) + outs << " [FpRegs]"; if (diffTpc) outs << " [Tpc]"; if (diffTnpc) @@ -608,26 +616,22 @@ Trace::InstRecord::dump(ostream &outs) printSectionHeader(outs, "General Purpose Registers"); static const char * regtypes[4] = {"%g", "%o", "%l", "%i"}; - for(int y = 0; y < 4; y++) - { - for(int x = 0; x < 8; x++) - { + for(int y = 0; y < 4; y++) { + for(int x = 0; x < 8; x++) { char label[8]; sprintf(label, "%s%d", regtypes[y], x); printRegPair(outs, label, thread->readIntReg(y*8+x), shared_data->intregs[y*8+x]); - /*outs << regtypes[y] << x << " " ; - outs << "0x" << hex << setw(16) - << thread->readIntReg(y*8+x); - if (thread->readIntReg(y*8 + x) - != shared_data->intregs[y*8+x]) - outs << " X "; - else - outs << " | "; - outs << "0x" << setw(16) << hex - << shared_data->intregs[y*8+x] - << endl;*/ + } + } + if (diffFpRegs) { + for (int x = 0; x < 32; x++) { + char label[8]; + sprintf(label, "%%f%d", x); + printRegPair(outs, label, + thread->readFloatRegBits(x,FloatRegFile::DoubleWidth), + shared_data->fpregs[x]); } } if (diffTlb) { |