Clean up tracing stuff more, get rid of the trace log since

its not all that useful. Fix a few bugs with python/C++
integration.

--HG--
extra : convert_revision : a706512f7dc8b0c88f1ff96fe35ab8fbf9548b78

1 files changed, 13 insertions, 13 deletions

diff --git a/src/cpu/exetrace.hh b/src/cpu/exetrace.hh
index a825f6a82..95a142f3c 100644
--- a/src/cpu/exetrace.hh
+++ b/src/cpu/exetrace.hh
@@ -36,22 +36,24 @@
 #include <fstream>
 #include <vector>
 
-#include "sim/host.hh"
-#include "cpu/inst_seq.hh"	// for InstSeqNum
 #include "base/trace.hh"
-#include "cpu/thread_context.hh"
+#include "cpu/inst_seq.hh"	// for InstSeqNum
 #include "cpu/static_inst.hh"
+#include "cpu/thread_context.hh"
+#include "sim/host.hh"
 
 class ThreadContext;
 
 
 namespace Trace {
 
-class InstRecord : public Record
+class InstRecord
 {
   protected:
     typedef TheISA::IntRegFile IntRegFile;
 
+    Tick when;
+
     // The following fields are initialized by the constructor and
     // thus guaranteed to be valid.
     ThreadContext *thread;
@@ -95,10 +97,10 @@ class InstRecord : public Record
     bool regs_valid;
 
   public:
-    InstRecord(Tick _cycle, ThreadContext *_thread,
+    InstRecord(Tick _when, ThreadContext *_thread,
                const StaticInstPtr &_staticInst,
                Addr _pc, bool spec)
-        : Record(_cycle), thread(_thread),
+        : when(_when), thread(_thread),
           staticInst(_staticInst), PC(_pc),
           misspeculating(spec)
     {
@@ -110,9 +112,7 @@ class InstRecord : public Record
         cp_seq_valid = false;
     }
 
-    virtual ~InstRecord() { }
-
-    virtual void dump(std::ostream &outs);
+    ~InstRecord() { }
 
     void setAddr(Addr a) { addr = a; addr_valid = true; }
 
@@ -136,11 +136,11 @@ class InstRecord : public Record
 
     void setRegs(const IntRegFile &regs);
 
-    void finalize() { theLog.append(this); }
+    void dump();
 
     enum InstExecFlagBits {
         TRACE_MISSPEC = 0,
-        PRINT_CYCLE,
+        PRINT_TICKS,
         PRINT_OP_CLASS,
         PRINT_THREAD_NUM,
         PRINT_RESULT_DATA,
@@ -176,13 +176,13 @@ InstRecord::setRegs(const IntRegFile &regs)
 
 inline
 InstRecord *
-getInstRecord(Tick cycle, ThreadContext *tc,
+getInstRecord(Tick when, ThreadContext *tc,
               const StaticInstPtr staticInst,
               Addr pc)
 {
     if (DTRACE(InstExec) &&
         (InstRecord::traceMisspec() || !tc->misspeculating())) {
-        return new InstRecord(cycle, tc, staticInst, pc,
+        return new InstRecord(when, tc, staticInst, pc,
                               tc->misspeculating());
     }