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| author | Gabe Black <gblack@eecs.umich.edu> | 2006-08-11 20:21:35 -0400 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2006-08-11 20:21:35 -0400 |
| commit | ec26f0bb3d3d0af9dc87e5e3f25c2b90f2db0332 (patch) | |
| tree | f4f1307f30e0941f448087992db77562d9f7330c /src/cpu/exetrace.hh | |
| parent | 800e6ecc07d01c49808cc4f9597d94cc8cfd9fae (diff) | |
| download | gem5-ec26f0bb3d3d0af9dc87e5e3f25c2b90f2db0332.tar.xz | |
Started adding a system to output data after every instruction.
src/arch/alpha/regfile.hh:
src/arch/mips/regfile/float_regfile.hh:
src/arch/mips/regfile/int_regfile.hh:
src/arch/mips/regfile/misc_regfile.hh:
src/cpu/exetrace.hh:
Added functions to start to support dumping register values once per cycle.
src/cpu/exetrace.cc:
Added some code to support printing the value of registers after each cycle.
src/python/m5/main.py:
Options to turn on output after every instruction. They are commented out.
--HG--
extra : convert_revision : 168a48a6b98ab6be412a96bdee831c71906958b0
Diffstat (limited to 'src/cpu/exetrace.hh')
| -rw-r--r-- | src/cpu/exetrace.hh | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/cpu/exetrace.hh b/src/cpu/exetrace.hh index 95f8b449c..8cc98b777 100644 --- a/src/cpu/exetrace.hh +++ b/src/cpu/exetrace.hh @@ -147,6 +147,7 @@ class InstRecord : public Record PRINT_INT_REGS, PRINT_FETCH_SEQ, PRINT_CP_SEQ, + PRINT_REG_DELTA, PC_SYMBOL, INTEL_FORMAT, NUM_BITS |