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authorGabe Black <gblack@eecs.umich.edu>2010-12-20 16:24:40 -0500
committerGabe Black <gblack@eecs.umich.edu>2010-12-20 16:24:40 -0500
commit672d6a4b98165952e0afa0057f851f150bc657ec (patch)
tree4bd03e87c875477d172910ee1a0a838111949d83 /src/cpu/inorder/SConscript
parent89850d6370b29272788cb73165341ced68e3bd53 (diff)
downloadgem5-672d6a4b98165952e0afa0057f851f150bc657ec.tar.xz
Style: Replace some tabs with spaces.
Diffstat (limited to 'src/cpu/inorder/SConscript')
-rw-r--r--src/cpu/inorder/SConscript106
1 files changed, 53 insertions, 53 deletions
diff --git a/src/cpu/inorder/SConscript b/src/cpu/inorder/SConscript
index 90cb285f5..37c235759 100644
--- a/src/cpu/inorder/SConscript
+++ b/src/cpu/inorder/SConscript
@@ -31,60 +31,60 @@
Import('*')
if 'InOrderCPU' in env['CPU_MODELS']:
- SimObject('InOrderCPU.py')
- SimObject('InOrderTrace.py')
+ SimObject('InOrderCPU.py')
+ SimObject('InOrderTrace.py')
- TraceFlag('ResReqCount')
- TraceFlag('InOrderStage')
- TraceFlag('InOrderStall')
- TraceFlag('InOrderCPU')
- TraceFlag('RegDepMap')
- TraceFlag('InOrderDynInst')
- TraceFlag('Resource')
- TraceFlag('InOrderAGEN')
- TraceFlag('InOrderFetchSeq')
- TraceFlag('InOrderTLB')
- TraceFlag('InOrderCachePort')
- TraceFlag('InOrderBPred')
- TraceFlag('InOrderDecode')
- TraceFlag('InOrderExecute')
- TraceFlag('InOrderInstBuffer')
- TraceFlag('InOrderUseDef')
- TraceFlag('InOrderMDU')
- TraceFlag('InOrderGraduation')
- TraceFlag('ThreadModel')
- TraceFlag('RefCount')
- TraceFlag('AddrDep')
-
+ TraceFlag('ResReqCount')
+ TraceFlag('InOrderStage')
+ TraceFlag('InOrderStall')
+ TraceFlag('InOrderCPU')
+ TraceFlag('RegDepMap')
+ TraceFlag('InOrderDynInst')
+ TraceFlag('Resource')
+ TraceFlag('InOrderAGEN')
+ TraceFlag('InOrderFetchSeq')
+ TraceFlag('InOrderTLB')
+ TraceFlag('InOrderCachePort')
+ TraceFlag('InOrderBPred')
+ TraceFlag('InOrderDecode')
+ TraceFlag('InOrderExecute')
+ TraceFlag('InOrderInstBuffer')
+ TraceFlag('InOrderUseDef')
+ TraceFlag('InOrderMDU')
+ TraceFlag('InOrderGraduation')
+ TraceFlag('ThreadModel')
+ TraceFlag('RefCount')
+ TraceFlag('AddrDep')
- CompoundFlag('InOrderCPUAll', [ 'InOrderStage', 'InOrderStall', 'InOrderCPU',
- 'InOrderMDU', 'InOrderAGEN', 'InOrderFetchSeq', 'InOrderTLB', 'InOrderBPred',
- 'InOrderDecode', 'InOrderExecute', 'InOrderInstBuffer', 'InOrderUseDef',
- 'InOrderGraduation', 'InOrderCachePort', 'RegDepMap', 'Resource',
- 'ThreadModel', 'AddrDep'])
- Source('pipeline_traits.cc')
- Source('inorder_dyn_inst.cc')
- Source('inorder_cpu_builder.cc')
- Source('inorder_trace.cc')
- Source('pipeline_stage.cc')
- Source('first_stage.cc')
- Source('resource.cc')
- Source('resources/agen_unit.cc')
- Source('resources/execution_unit.cc')
- Source('resources/bpred_unit.cc')
- Source('resources/branch_predictor.cc')
- Source('resources/cache_unit.cc')
- Source('resources/use_def.cc')
- Source('resources/decode_unit.cc')
- Source('resources/inst_buffer.cc')
- Source('resources/graduation_unit.cc')
- Source('resources/fetch_seq_unit.cc')
- Source('resources/mult_div_unit.cc')
- Source('resource_pool.cc')
- Source('resource_sked.cc')
- Source('reg_dep_map.cc')
- Source('thread_state.cc')
- Source('thread_context.cc')
- Source('cpu.cc')
+ CompoundFlag('InOrderCPUAll', [ 'InOrderStage', 'InOrderStall', 'InOrderCPU',
+ 'InOrderMDU', 'InOrderAGEN', 'InOrderFetchSeq', 'InOrderTLB', 'InOrderBPred',
+ 'InOrderDecode', 'InOrderExecute', 'InOrderInstBuffer', 'InOrderUseDef',
+ 'InOrderGraduation', 'InOrderCachePort', 'RegDepMap', 'Resource',
+ 'ThreadModel', 'AddrDep'])
+
+ Source('pipeline_traits.cc')
+ Source('inorder_dyn_inst.cc')
+ Source('inorder_cpu_builder.cc')
+ Source('inorder_trace.cc')
+ Source('pipeline_stage.cc')
+ Source('first_stage.cc')
+ Source('resource.cc')
+ Source('resources/agen_unit.cc')
+ Source('resources/execution_unit.cc')
+ Source('resources/bpred_unit.cc')
+ Source('resources/branch_predictor.cc')
+ Source('resources/cache_unit.cc')
+ Source('resources/use_def.cc')
+ Source('resources/decode_unit.cc')
+ Source('resources/inst_buffer.cc')
+ Source('resources/graduation_unit.cc')
+ Source('resources/fetch_seq_unit.cc')
+ Source('resources/mult_div_unit.cc')
+ Source('resource_pool.cc')
+ Source('resource_sked.cc')
+ Source('reg_dep_map.cc')
+ Source('thread_state.cc')
+ Source('thread_context.cc')
+ Source('cpu.cc')