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author | Korey Sewell <ksewell@umich.edu> | 2009-03-04 13:17:05 -0500 |
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committer | Korey Sewell <ksewell@umich.edu> | 2009-03-04 13:17:05 -0500 |
commit | f98e9161a83cd9bafbe7e5612db344a8b5cb2ae1 (patch) | |
tree | 01defa239ea51a18d706814beb31fe5d7da55a87 /src/cpu/inorder/comm.hh | |
parent | 846f953c2bc8f9922afe62c30e60f9b5b531d09e (diff) | |
download | gem5-f98e9161a83cd9bafbe7e5612db344a8b5cb2ae1.tar.xz |
InOrder didnt have all it's params set to a default value, which is now required for M5 objects; Also, a # of values need to be reset to 0 (or the appropriate value) before we assume they are OK for use.
Diffstat (limited to 'src/cpu/inorder/comm.hh')
-rw-r--r-- | src/cpu/inorder/comm.hh | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/cpu/inorder/comm.hh b/src/cpu/inorder/comm.hh index c687a9ab4..18bb24169 100644 --- a/src/cpu/inorder/comm.hh +++ b/src/cpu/inorder/comm.hh @@ -53,6 +53,14 @@ struct InterStageStruct { uint64_t nextPC; InstSeqNum squashedSeqNum; bool includeSquashInst; + + InterStageStruct() + :size(0), squash(false), + branchMispredict(false), branchTaken(false), + mispredPC(0), nextPC(0), + squashedSeqNum(0), includeSquashInst(false) + { } + }; /** Turn This into a Class */ |