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| author | Korey Sewell <ksewell@umich.edu> | 2011-06-19 21:43:37 -0400 |
|---|---|---|
| committer | Korey Sewell <ksewell@umich.edu> | 2011-06-19 21:43:37 -0400 |
| commit | 71018f5e8b59c359065580a41a96f1a78a88dea9 (patch) | |
| tree | 17486a65f463cb7bb9085182edc2d480cde7b1f6 /src/cpu/inorder/comm.hh | |
| parent | 34b2500f09639e950cb590a34e51a1db853abf11 (diff) | |
| download | gem5-71018f5e8b59c359065580a41a96f1a78a88dea9.tar.xz | |
inorder: remove stalls on trap squash
Diffstat (limited to 'src/cpu/inorder/comm.hh')
| -rw-r--r-- | src/cpu/inorder/comm.hh | 20 |
1 files changed, 17 insertions, 3 deletions
diff --git a/src/cpu/inorder/comm.hh b/src/cpu/inorder/comm.hh index b05ec4eff..02a7e9fa4 100644 --- a/src/cpu/inorder/comm.hh +++ b/src/cpu/inorder/comm.hh @@ -55,18 +55,32 @@ struct InterStageStruct { /** Struct that defines all backwards communication. */ struct TimeStruct { - struct stageComm { + struct StageComm { bool squash; InstSeqNum doneSeqNum; bool uncached; ThePipeline::DynInstPtr uncachedLoad; - }; - stageComm stageInfo[ThePipeline::NumStages][ThePipeline::MaxThreads]; + StageComm() + : squash(false), doneSeqNum(0), uncached(false), uncachedLoad(NULL) + { } + }; + StageComm stageInfo[ThePipeline::NumStages][ThePipeline::MaxThreads]; bool stageBlock[ThePipeline::NumStages][ThePipeline::MaxThreads]; bool stageUnblock[ThePipeline::NumStages][ThePipeline::MaxThreads]; + + TimeStruct() + { + for (int i = 0; i < ThePipeline::NumStages; i++) { + for (int j = 0; j < ThePipeline::MaxThreads; j++) { + stageBlock[i][j] = false; + stageUnblock[i][j] = false; + } + } + } + }; #endif //__CPU_INORDER_COMM_HH__ |