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| author | Andreas Hansson <andreas.hansson@arm.com> | 2014-09-19 10:35:18 -0400 |
|---|---|---|
| committer | Andreas Hansson <andreas.hansson@arm.com> | 2014-09-19 10:35:18 -0400 |
| commit | 41fc8a573ea61b2463606a0714a9e563494da329 (patch) | |
| tree | c038491b91eb89fa487781bca6ba5b6b1ba65ec3 /src/cpu/inorder/cpu.cc | |
| parent | 619c5519fe214250d537527ec95191a9b3d6fad2 (diff) | |
| download | gem5-41fc8a573ea61b2463606a0714a9e563494da329.tar.xz | |
arch: Pass faults by const reference where possible
This patch changes how faults are passed between methods in an attempt
to copy as few reference-counting pointer instances as possible. This
should avoid unecessary copies being created, contributing to the
increment/decrement of the reference counters.
Diffstat (limited to 'src/cpu/inorder/cpu.cc')
| -rw-r--r-- | src/cpu/inorder/cpu.cc | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/cpu/inorder/cpu.cc b/src/cpu/inorder/cpu.cc index e966e8e83..c825f2979 100644 --- a/src/cpu/inorder/cpu.cc +++ b/src/cpu/inorder/cpu.cc @@ -128,8 +128,8 @@ InOrderCPU::TickEvent::description() const } InOrderCPU::CPUEvent::CPUEvent(InOrderCPU *_cpu, CPUEventType e_type, - Fault fault, ThreadID _tid, DynInstPtr inst, - CPUEventPri event_pri) + const Fault &fault, ThreadID _tid, + DynInstPtr inst, CPUEventPri event_pri) : Event(event_pri), cpu(_cpu) { setEvent(e_type, fault, _tid, inst); @@ -910,7 +910,7 @@ InOrderCPU::getInterrupts() } void -InOrderCPU::processInterrupts(Fault interrupt) +InOrderCPU::processInterrupts(const Fault &interrupt) { // Check for interrupts here. For now can copy the code that // exists within isa_fullsys_traits.hh. Also assume that thread 0 @@ -928,7 +928,7 @@ InOrderCPU::processInterrupts(Fault interrupt) } void -InOrderCPU::trapContext(Fault fault, ThreadID tid, DynInstPtr inst, +InOrderCPU::trapContext(const Fault &fault, ThreadID tid, DynInstPtr inst, Cycles delay) { scheduleCpuEvent(Trap, fault, tid, inst, delay); @@ -936,7 +936,7 @@ InOrderCPU::trapContext(Fault fault, ThreadID tid, DynInstPtr inst, } void -InOrderCPU::trap(Fault fault, ThreadID tid, DynInstPtr inst) +InOrderCPU::trap(const Fault &fault, ThreadID tid, DynInstPtr inst) { fault->invoke(tcBase(tid), inst->staticInst); removePipelineStalls(tid); @@ -970,7 +970,7 @@ InOrderCPU::squashDueToMemStall(int stage_num, InstSeqNum seq_num, } void -InOrderCPU::scheduleCpuEvent(CPUEventType c_event, Fault fault, +InOrderCPU::scheduleCpuEvent(CPUEventType c_event, const Fault &fault, ThreadID tid, DynInstPtr inst, Cycles delay, CPUEventPri event_pri) { @@ -1847,7 +1847,7 @@ InOrderCPU::wakeup() } void -InOrderCPU::syscallContext(Fault fault, ThreadID tid, DynInstPtr inst, +InOrderCPU::syscallContext(const Fault &fault, ThreadID tid, DynInstPtr inst, Cycles delay) { // Syscall must be non-speculative, so squash from last stage |