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author | Gabe Black <gblack@eecs.umich.edu> | 2011-10-31 02:58:22 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2011-10-31 02:58:22 -0700 |
commit | 8ad2b8c5596b817267fbf7a39e6ce28ffb49789c (patch) | |
tree | e20e9aa7253fb12e2e6b8abf8932e726728004c1 /src/cpu/inorder/cpu.cc | |
parent | ef097eb69cec0753074d5190e5ff91aabfaef5e5 (diff) | |
download | gem5-8ad2b8c5596b817267fbf7a39e6ce28ffb49789c.tar.xz |
SE/FS: Make the functions available from the TC consistent between SE and FS.
Diffstat (limited to 'src/cpu/inorder/cpu.cc')
-rw-r--r-- | src/cpu/inorder/cpu.cc | 10 |
1 files changed, 1 insertions, 9 deletions
diff --git a/src/cpu/inorder/cpu.cc b/src/cpu/inorder/cpu.cc index cfc083718..97fbe737e 100644 --- a/src/cpu/inorder/cpu.cc +++ b/src/cpu/inorder/cpu.cc @@ -46,6 +46,7 @@ #include "cpu/activity.hh" #include "cpu/base.hh" #include "cpu/exetrace.hh" +#include "cpu/quiesce_event.hh" #include "cpu/simple_thread.hh" #include "cpu/thread_context.hh" #include "debug/Activity.hh" @@ -57,11 +58,7 @@ #include "params/InOrderCPU.hh" #include "sim/process.hh" #include "sim/stat_control.hh" - -#if FULL_SYSTEM -#include "cpu/quiesce_event.hh" #include "sim/system.hh" -#endif #if THE_ISA == ALPHA_ISA #include "arch/alpha/osfpal.hh" @@ -786,7 +783,6 @@ InOrderCPU::getPort(const std::string &if_name, int idx) return resPool->getPort(if_name, idx); } -#if FULL_SYSTEM Fault InOrderCPU::hwrei(ThreadID tid) { @@ -891,7 +887,6 @@ InOrderCPU::processInterrupts(Fault interrupt) trap(interrupt, threadContexts[0]->contextId(), dummyBufferInst); } - void InOrderCPU::updateMemPorts() { @@ -901,7 +896,6 @@ InOrderCPU::updateMemPorts() for (ThreadID i = 0; i < size; ++i) thread[i]->connectMemPorts(thread[i]->getTC()); } -#endif void InOrderCPU::trapContext(Fault fault, ThreadID tid, DynInstPtr inst, int delay) @@ -1709,7 +1703,6 @@ InOrderCPU::wakeup() } #endif -#if !FULL_SYSTEM void InOrderCPU::syscallContext(Fault fault, ThreadID tid, DynInstPtr inst, int delay) { @@ -1747,7 +1740,6 @@ InOrderCPU::syscall(int64_t callnum, ThreadID tid) // Clear Non-Speculative Block Variable nonSpecInstActive[tid] = false; } -#endif TheISA::TLB* InOrderCPU::getITBPtr() |