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author | Korey Sewell <ksewell@umich.edu> | 2011-02-18 14:30:05 -0500 |
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committer | Korey Sewell <ksewell@umich.edu> | 2011-02-18 14:30:05 -0500 |
commit | 0fe19836c7101fea012148a4852b9619087e42d6 (patch) | |
tree | b18ecd867e6d7e6a6eb3887ed4f82ddaef8205ec /src/cpu/inorder/cpu.cc | |
parent | 89335118a5b50d44e653d9763908a427e8687f46 (diff) | |
download | gem5-0fe19836c7101fea012148a4852b9619087e42d6.tar.xz |
inorder: update graduation unit
make sure instructions are able to commit before writing back to the RF
do not commit more than 1 non-speculative instruction per cycle
Diffstat (limited to 'src/cpu/inorder/cpu.cc')
-rw-r--r-- | src/cpu/inorder/cpu.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/inorder/cpu.cc b/src/cpu/inorder/cpu.cc index 4130b9e14..0ec4c9861 100644 --- a/src/cpu/inorder/cpu.cc +++ b/src/cpu/inorder/cpu.cc @@ -465,12 +465,12 @@ InOrderCPU::createBackEndSked(DynInstPtr inst) W.needs(ExecUnit, ExecutionUnit::ExecuteInst); } + W.needs(Grad, GraduationUnit::GraduateInst); + for (int idx=0; idx < inst->numDestRegs(); idx++) { W.needs(RegManager, UseDefUnit::WriteDestReg, idx); } - W.needs(Grad, GraduationUnit::GraduateInst); - // Insert Back Schedule into our cache of // resource schedules addToSkedCache(inst, res_sked); |