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author | Korey Sewell <ksewell@umich.edu> | 2010-01-31 18:26:13 -0500 |
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committer | Korey Sewell <ksewell@umich.edu> | 2010-01-31 18:26:13 -0500 |
commit | eac5eac67ae8076e934d78063a24eeef08f25413 (patch) | |
tree | a782cc748f191af1b5ddf3027913067599019d02 /src/cpu/inorder/cpu.hh | |
parent | d8e0935af2805bc2c4bdfbab7de2c63f7fde46f7 (diff) | |
download | gem5-eac5eac67ae8076e934d78063a24eeef08f25413.tar.xz |
inorder: squash on memory stall
add code to recognize memory stalls in resources and the pipeline as well
as squash a thread if there is a stall and we are in the switch on cache miss
model
Diffstat (limited to 'src/cpu/inorder/cpu.hh')
-rw-r--r-- | src/cpu/inorder/cpu.hh | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/src/cpu/inorder/cpu.hh b/src/cpu/inorder/cpu.hh index 4c7b2710d..5d34de67a 100644 --- a/src/cpu/inorder/cpu.hh +++ b/src/cpu/inorder/cpu.hh @@ -183,7 +183,7 @@ class InOrderCPU : public BaseCPU EnableVPEs, Trap, InstGraduated, - SquashAll, + SquashFromMemStall, UpdatePCs, NumCPUEvents }; @@ -344,6 +344,12 @@ class InOrderCPU : public BaseCPU void trap(Fault fault, ThreadID tid, int delay = 0); void trapCPU(Fault fault, ThreadID tid); + /** squashFromMemStall() - sets up a squash event + * squashDueToMemStall() - squashes pipeline + */ + void squashFromMemStall(DynInstPtr inst, ThreadID tid, int delay = 0); + void squashDueToMemStall(int stage_num, InstSeqNum seq_num, ThreadID tid); + /** Setup CPU to insert a thread's context */ void insertThread(ThreadID tid); |